From: Michael Meissner Date: Fri, 21 Jan 2022 23:08:50 +0000 (-0500) Subject: Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 X-Git-Tag: upstream/12.2.0~1885 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f9063d12633c62a089115df032a19295854d8b06;p=platform%2Fupstream%2Fgcc.git Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 If you compile module_advect_em.F90 with -Ofast -mcpu=power10, one module is large enough that we can't use a single conditional jump to span the function. Instead, GCC has to reverse the condition, and do a conditional jump around an unconditional branch. It turns out when xxspltiw and xxspltdp instructions were generated, they were not marked as being prefixed (i.e. length of 12 bytes instead of 4 bytes). This meant the calculations for the branch length were off, which in turn meant the assembler raised an error because it couldn't do the conditional jump. The fix is to explicitly set the prefixed attribute when we are loading up vector constants with the xxspltiw or xxspltidp instructions. I have removed the code that sets the prefixed attribute for xxspltiw, xxspltidp, and xxsplti32dx instructions, since it no longer will be invoked. I have also explicitly set the prefixed attribute for load SF and DF mode constants with xxsplitw and xxspltidp. Previously, it was not set on these insns, but when the insn was split to get the XXSPLTIW/XXSPLTIDP forms, those forms already had the prefixed attribute set. 2022-01-21 Michael Meissner gcc/ PR target/104136 * config/rs6000/rs6000-protos.h (prefixed_xxsplti_p): Delete. * config/rs6000/rs6000.cc (prefixed_xxsplti_p): Delete. * config/rs6000/rs6000.md (prefixed attribute): Delete section that sets the prefixed attribute for xxspltiw, xxspltidp, and xxsplti32dx instructions. (movsf_hardfloat): Explicitly set the prefixed attribute when xxspltiw and xxspltidp instructions are generated. (mov_hardfloat32): Likewise. (mov_hardfloat64): Likewise. * config/rs6000/vsx.md (vsx_mov_64bit): Explicitly set the prefixed attribute for xxspltiw and xxspltidp instructions. (vsx_mov_32bit): Likewise. --- diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index e322ac0..3ea0102 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -199,7 +199,6 @@ enum non_prefixed_form reg_to_non_prefixed (rtx reg, machine_mode mode); extern bool prefixed_load_p (rtx_insn *); extern bool prefixed_store_p (rtx_insn *); extern bool prefixed_paddi_p (rtx_insn *); -extern bool prefixed_xxsplti_p (rtx_insn *); extern void rs6000_asm_output_opcode (FILE *); extern void output_pcrel_opt_reloc (rtx); extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int); diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 587fb11..943f53e 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -26609,44 +26609,6 @@ prefixed_paddi_p (rtx_insn *insn) return (iform == INSN_FORM_PCREL_EXTERNAL || iform == INSN_FORM_PCREL_LOCAL); } -/* Whether an instruction is a prefixed XXSPLTI* instruction. This is called - from the prefixed attribute processing. */ - -bool -prefixed_xxsplti_p (rtx_insn *insn) -{ - rtx set = single_set (insn); - if (!set) - return false; - - rtx dest = SET_DEST (set); - rtx src = SET_SRC (set); - machine_mode mode = GET_MODE (dest); - - if (!REG_P (dest) && !SUBREG_P (dest)) - return false; - - if (GET_CODE (src) == UNSPEC) - { - int unspec = XINT (src, 1); - return (unspec == UNSPEC_XXSPLTIW - || unspec == UNSPEC_XXSPLTIDP - || unspec == UNSPEC_XXSPLTI32DX); - } - - vec_const_128bit_type vsx_const; - if (vec_const_128bit_to_bytes (src, mode, &vsx_const)) - { - if (constant_generates_xxspltiw (&vsx_const)) - return true; - - if (constant_generates_xxspltidp (&vsx_const)) - return true; - } - - return false; -} - /* Whether the next instruction needs a 'p' prefix issued before the instruction is printed out. */ static bool prepend_p_to_next_insn; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 59531b6..4e22118 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -315,11 +315,6 @@ (eq_attr "type" "integer,add") (if_then_else (match_test "prefixed_paddi_p (insn)") (const_string "yes") - (const_string "no")) - - (eq_attr "type" "vecperm") - (if_then_else (match_test "prefixed_xxsplti_p (insn)") - (const_string "yes") (const_string "no"))] (const_string "no"))) @@ -7857,7 +7852,11 @@ (set_attr "isa" "*, *, p9v, p8v, *, p9v, p8v, *, *, *, *, *, - *, *, *, *, p10")]) + *, *, *, *, p10") + (set_attr "prefixed" + "*, *, *, *, *, *, + *, *, *, *, *, *, + *, *, *, *, yes")]) ;; LWZ LFIWZX STW STFIWX MTVSRWZ MFVSRWZ ;; FMR MR MT%0 MF%1 NOP @@ -8159,7 +8158,11 @@ (set_attr "isa" "*, *, *, p9v, p9v, p7v, p7v, *, *, *, - *, *, *, p10")]) + *, *, *, p10") + (set_attr "prefixed" + "*, *, *, *, *, + *, *, *, *, *, + *, *, *, yes")]) ;; STW LWZ MR G-const H-const F-const @@ -8232,7 +8235,12 @@ "*, *, *, p9v, p9v, p7v, p7v, *, *, *, *, *, *, *, *, - *, p8v, p8v, p10")]) + *, p8v, p8v, p10") + (set_attr "prefixed" + "*, *, *, *, *, + *, *, *, *, *, + *, *, *, *, *, + *, *, *, *")]) ;; STD LD MR MT MF G-const ;; H-const F-const Special diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index e84ffb6..c8c891e 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1237,7 +1237,12 @@ ", , , *, *, *, *, *, *, *, p9v, *, p10, p10, - , *, *, *, *")]) + , *, *, *, *") + (set_attr "prefixed" + "*, *, *, *, *, *, + *, *, *, *, *, *, + *, yes, + *, *, *, *, *")]) ;; VSX store VSX load VSX move GPR load GPR store GPR move ;; LXVKQ XXSPLTI* @@ -1276,6 +1281,11 @@ ", , , *, *, *, p10, p10, p9v, *, , *, *, + *, *") + (set_attr "prefixed" + "*, *, *, *, *, *, + *, yes, + *, *, *, *, *, *, *")]) ;; Explicit load/store expanders for the builtin functions