From: Christian Eggers Date: Thu, 13 Aug 2020 08:59:59 +0000 (+0200) Subject: dt-bindings: at25: convert the binding document to yaml X-Git-Tag: v5.15~2681^2~111 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f8f79fa6bb258fe19cc0e9bc220807fb171d6865;p=platform%2Fkernel%2Flinux-starfive.git dt-bindings: at25: convert the binding document to yaml Convert the binding document for at25 EEPROMs from txt to yaml. Signed-off-by: Christian Eggers Link: https://lore.kernel.org/r/20200813085959.15946-1-ceggers@arri.de Signed-off-by: Rob Herring --- diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt deleted file mode 100644 index fcacd97a..0000000 --- a/Documentation/devicetree/bindings/eeprom/at25.txt +++ /dev/null @@ -1,45 +0,0 @@ -EEPROMs (SPI) compatible with Atmel at25. - -Required properties: -- compatible : Should be ",", and generic value "atmel,at25". - Example "," values: - "anvo,anv32e61w" - "microchip,25lc040" - "st,m95m02" - "st,m95256" - -- reg : chip select number -- spi-max-frequency : max spi frequency to use -- pagesize : size of the eeprom page -- size : total eeprom size in bytes -- address-width : number of address bits (one of 8, 9, 16, or 24). - For 9 bits, the MSB of the address is sent as bit 3 of the instruction - byte, before the address byte. - -Optional properties: -- spi-cpha : SPI shifted clock phase, as per spi-bus bindings. -- spi-cpol : SPI inverse clock polarity, as per spi-bus bindings. -- read-only : this parameter-less property disables writes to the eeprom -- wp-gpios : GPIO to which the write-protect pin of the chip is connected - -Obsolete legacy properties can be used in place of "size", "pagesize", -"address-width", and "read-only": -- at25,byte-len : total eeprom size in bytes -- at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h -- at25,page-size : size of the eeprom page - -Additional compatible properties are also allowed. - -Example: - eeprom@0 { - compatible = "st,m95256", "atmel,at25"; - reg = <0> - spi-max-frequency = <5000000>; - spi-cpha; - spi-cpol; - wp-gpios = <&gpio1 3 0>; - - pagesize = <64>; - size = <32768>; - address-width = <16>; - }; diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml new file mode 100644 index 0000000..9810619 --- /dev/null +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/eeprom/at25.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: SPI EEPROMs compatible with Atmel's AT25 + +maintainers: + - Christian Eggers + +properties: + $nodename: + pattern: "^eeprom@[0-9a-f]{1,2}$" + + # There are multiple known vendors who manufacture EEPROM chips compatible + # with Atmel's AT25. The compatible string requires two items where the + # 'vendor' and 'model' parts of the first are the actual chip and the second + # item is fixed to "atmel,at25". Some existing bindings only have the + # "atmel,at25" part and should be fixed by somebody who knows vendor and + # product. + compatible: + oneOf: + - items: + - enum: + - anvo,anv32e61w + - atmel,at25256B + - fujitsu,mb85rs1mt + - fujitsu,mb85rs64 + - microchip,at25160bn + - microchip,25lc040 + - st,m95m02 + - st,m95256 + + - const: atmel,at25 + + # Please don't use this alternative for new bindings. + - items: + - const: atmel,at25 + + reg: + description: + Chip select number. + + spi-max-frequency: true + + pagesize: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072] + description: + Size of the eeprom page. + + size: + $ref: /schemas/types.yaml#definitions/uint32 + description: + Total eeprom size in bytes. + + address-width: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 8, 9, 16, 24 ] + description: + Number of address bits. + For 9 bits, the MSB of the address is sent as bit 3 of the instruction + byte, before the address byte. + + spi-cpha: true + + spi-cpol: true + + read-only: + description: + Disable writes to the eeprom. + type: boolean + + wp-gpios: + maxItems: 1 + description: + GPIO to which the write-protect pin of the chip is connected. + + # Deprecated: at25,byte-len, at25,addr-mode, at25,page-size + at25,byte-len: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Total eeprom size in bytes. Deprecated, use "size" property instead. + deprecated: true + + at25,addr-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Addr-mode flags, as defined in include/linux/spi/eeprom.h. + Deprecated, use "address-width" property instead. + deprecated: true + + at25,page-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the eeprom page. Deprecated, use "pagesize" property instead. + deprecated: true + +required: + - compatible + - reg + - spi-max-frequency + - pagesize + - size + - address-width + +additionalProperties: false + +examples: + - | + #include + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + compatible = "st,m95256", "atmel,at25"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpha; + spi-cpol; + wp-gpios = <&gpio1 3 0>; + + pagesize = <64>; + size = <32768>; + address-width = <16>; + }; + };