From: Jungseung Lee Date: Tue, 21 Apr 2020 06:33:13 +0000 (+0900) Subject: mtd: spi-nor: micron-st: Enable locking for n25q00 X-Git-Tag: v5.10.7~2372^2~4^2~11 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f80ff13135cb44a9be96f695d19212ae952ee5f4;p=platform%2Fkernel%2Flinux-rpi.git mtd: spi-nor: micron-st: Enable locking for n25q00 n25q00 uses the 4 bit Block Protection scheme and supports Top/Bottom protection via the BP and TB bits of the Status Register. Enable locking for n25q00. Tested with cirrus controller. Signed-off-by: Jungseung Lee Signed-off-by: Tudor Ambarus --- diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index 02c0b53..3dca5b9 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -61,6 +61,8 @@ static const struct flash_info st_parts[] = { SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | + SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE) }, { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |