From: Sagar Ghuge Date: Wed, 13 Oct 2021 23:53:44 +0000 (-0700) Subject: intel/compiler: Set correct return format for brw_SAMPLE X-Git-Tag: upstream/22.3.5~15433 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f78e33aa1aa132f8b028efcf462ce2ca7b0d674c;p=platform%2Fupstream%2Fmesa.git intel/compiler: Set correct return format for brw_SAMPLE on GFX8 onwards, we have only single bit to determine correct return format. v2: - Define macro and use it instead of hardcoded value. (Lionel) Signed-off-by: Sagar Ghuge Reviewed-by: Lionel Landwerlin Reviewed-by: Francisco Jerez Part-of: --- diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 1732abb..2720b24 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -1301,6 +1301,9 @@ enum brw_message_target { #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 #define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 +#define GFX8_SAMPLER_RETURN_FORMAT_32BITS 0 +#define GFX8_SAMPLER_RETURN_FORMAT_16BITS 1 + #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 8f59e41..30e07cd 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1063,6 +1063,9 @@ fs_generator::generate_get_buffer_size(fs_inst *inst, dst = vec16(dst); } + uint32_t return_format = + devinfo->ver >= 8 ? GFX8_SAMPLER_RETURN_FORMAT_32BITS : + BRW_SAMPLER_RETURN_FORMAT_SINT32; brw_SAMPLE(p, retype(dst, BRW_REGISTER_TYPE_UW), inst->base_mrf, @@ -1074,7 +1077,7 @@ fs_generator::generate_get_buffer_size(fs_inst *inst, inst->mlen, inst->header_size > 0, simd_mode, - BRW_SAMPLER_RETURN_FORMAT_SINT32); + return_format); } void