From: Pierre-Eric Pelloux-Prayer Date: Fri, 13 Jan 2023 15:13:46 +0000 (+0100) Subject: radeonsi/gfx11: fix ge_cntl programming X-Git-Tag: upstream/23.3.3~14085 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f73cdda983e72b57dc8769ec9f234dddcafd2491;p=platform%2Fupstream%2Fmesa.git radeonsi/gfx11: fix ge_cntl programming gfx11 renamed PRIM_GRP_SIZE to VERTS_PER_SUBGRP but another change was was missed. Update our code based on PAL's UniversalCmdBuffer::CalcGeCntl function (especially useVgtOnchipCntlForTess being false for gfx11). Fixes: 25a66477d02 ("radeonsi/gfx11: register changes") Reviewed-by: Marek Olšák Part-of: --- diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index 8678bdc..25c403a 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -1298,13 +1298,8 @@ static void gfx10_emit_ge_cntl(struct si_context *sctx, unsigned num_patches) if (NGG) { if (HAS_TESS) { if (GFX_VERSION >= GFX11) { - unsigned prim_grp_size = - G_03096C_PRIM_GRP_SIZE_GFX11(si_get_vs_inline(sctx, HAS_TESS, HAS_GS)->current->ge_cntl); - - ge_cntl = S_03096C_PRIMS_PER_SUBGRP(num_patches) | - S_03096C_VERTS_PER_SUBGRP(si_get_vs_inline(sctx, HAS_TESS, HAS_GS)->current->ngg.hw_max_esverts) | - S_03096C_BREAK_PRIMGRP_AT_EOI(key.u.tess_uses_prim_id) | - S_03096C_PRIM_GRP_SIZE_GFX11(prim_grp_size); + ge_cntl = si_get_vs_inline(sctx, HAS_TESS, HAS_GS)->current->ge_cntl | + S_03096C_BREAK_PRIMGRP_AT_EOI(key.u.tess_uses_prim_id); } else { ge_cntl = S_03096C_PRIM_GRP_SIZE_GFX10(num_patches) | S_03096C_VERT_GRP_SIZE(0) |