From: Steve MacLean <sdmaclea.qdt@qualcommdatacenter.com>
Date: Fri, 3 Nov 2017 18:06:51 +0000 (-0400)
Subject: [Arm64] emitIns_S_R imm size
X-Git-Tag: accepted/tizen/base/20180629.140029~663^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f65f303e5f83c3378de2bcbc6295fab08037c8f9;p=platform%2Fupstream%2Fcoreclr.git

[Arm64] emitIns_S_R imm size
---

diff --git a/src/jit/emitarm64.cpp b/src/jit/emitarm64.cpp
index 56df042..db31d7d 100644
--- a/src/jit/emitarm64.cpp
+++ b/src/jit/emitarm64.cpp
@@ -6547,7 +6547,7 @@ void emitter::emitIns_S_R(instruction ins, emitAttr attr, regNumber reg1, int va
         // The reserved register is not stored in idReg3() since that field overlaps with iiaLclVar.
         // It is instead implicit when idSetIsLclVar() is set, with this encoding format.
         regNumber rsvdReg = codeGen->rsGetRsvdReg();
-        codeGen->instGen_Set_Reg_To_Imm(size, rsvdReg, imm);
+        codeGen->instGen_Set_Reg_To_Imm(EA_8BYTE, rsvdReg, imm);
         fmt = IF_LS_3A;
     }