From: Bjorn Helgaas <bhelgaas@google.com>
Date: Wed, 6 Jun 2018 21:10:10 +0000 (-0500)
Subject: Merge branch 'pci/hotplug'
X-Git-Tag: v5.15~8684^2~19
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f64c14641028d4cbe52a753482ecf7334ec39724;p=platform%2Fkernel%2Flinux-starfive.git

Merge branch 'pci/hotplug'

  - fix use-before-set error in ibmphp (Dan Carpenter)

  - fix pciehp timeouts caused by Command Completed errata (Bjorn Helgaas)

  - fix refcounting in pnv_php hotplug (Julia Lawall)

  - clear pciehp Presence Detect and Data Link Layer Status Changed on
    resume so we don't miss hotplug events (Mika Westerberg)

  - only request pciehp control if we support it, so platform can use ACPI
    hotplug otherwise (Mika Westerberg)

  - convert SHPC to be builtin only (Mika Westerberg)

  - request SHPC control via _OSC if we support it (Mika Westerberg)

  - simplify SHPC handoff from firmware (Mika Westerberg)

* pci/hotplug:
  PCI: Improve "partially hidden behind bridge" log message
  PCI: Improve pci_scan_bridge() and pci_scan_bridge_extend() doc
  PCI: Move resource distribution for single bridge outside loop
  PCI: Account for all bridges on bus when distributing bus numbers
  ACPI / hotplug / PCI: Drop unnecessary parentheses
  ACPI / hotplug / PCI: Mark stale PCI devices disconnected
  ACPI / hotplug / PCI: Don't scan bridges managed by native hotplug
  PCI: hotplug: Add hotplug_is_native()
  PCI: shpchp: Add shpchp_is_native()
  PCI: shpchp: Fix AMD POGO identification
  PCI: shpchp: Use dev_printk() for OSHP-related messages
  PCI: shpchp: Remove get_hp_hw_control_from_firmware() wrapper
  PCI: shpchp: Remove acpi_get_hp_hw_control_from_firmware() flags
  PCI: shpchp: Rely on previous _OSC results
  PCI: shpchp: Request SHPC control via _OSC when adding host bridge
  PCI: shpchp: Convert SHPC to be builtin only
  PCI: pciehp: Make pciehp_is_native() stricter
  PCI: pciehp: Rename host->native_hotplug to host->native_pcie_hotplug
  PCI: pciehp: Request control of native hotplug only if supported
  PCI: pciehp: Clear Presence Detect and Data Link Layer Status Changed on resume
  PCI: pnv_php: Add missing of_node_put()
  PCI: pciehp: Add quirk for Command Completed errata
  PCI: Add Qualcomm vendor ID
  PCI: ibmphp: Fix use-before-set in get_max_bus_speed()

# Conflicts:
#	drivers/acpi/pci_root.c
---

f64c14641028d4cbe52a753482ecf7334ec39724
diff --cc drivers/acpi/pci_root.c
index 2ff0d67,d9b8407..7433035
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@@ -473,12 -472,14 +473,17 @@@ static void negotiate_os_control(struc
  	}
  
  	control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
- 		| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
  		| OSC_PCI_EXPRESS_PME_CONTROL;
  
 +	if (IS_ENABLED(CONFIG_PCIEASPM))
 +		control |= OSC_PCI_EXPRESS_LTR_CONTROL;
 +
+ 	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
+ 		control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
+ 
+ 	if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
+ 		control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
+ 
  	if (pci_aer_available()) {
  		if (aer_acpi_firmware_first())
  			dev_info(&device->dev,
diff --cc drivers/pci/probe.c
index 4fd4029,3100ede..3a36d30
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@@ -552,9 -552,9 +552,10 @@@ struct pci_host_bridge *pci_alloc_host_
  	 * OS from interfering.
  	 */
  	bridge->native_aer = 1;
- 	bridge->native_hotplug = 1;
+ 	bridge->native_pcie_hotplug = 1;
+ 	bridge->native_shpc_hotplug = 1;
  	bridge->native_pme = 1;
 +	bridge->native_ltr = 1;
  
  	return bridge;
  }
diff --cc include/linux/pci.h
index 2619ab3,a4968cd..2fbdb93
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@@ -472,9 -474,9 +475,10 @@@ struct pci_host_bridge 
  	unsigned int	ignore_reset_delay:1;	/* For entire hierarchy */
  	unsigned int	no_ext_tags:1;		/* No Extended Tags */
  	unsigned int	native_aer:1;		/* OS may use PCIe AER */
- 	unsigned int	native_hotplug:1;	/* OS may use PCIe hotplug */
+ 	unsigned int	native_pcie_hotplug:1;	/* OS may use PCIe hotplug */
+ 	unsigned int	native_shpc_hotplug:1;	/* OS may use SHPC hotplug */
  	unsigned int	native_pme:1;		/* OS may use PCIe PME */
 +	unsigned int	native_ltr:1;		/* OS may use PCIe LTR */
  	/* Resource alignment requirements */
  	resource_size_t (*align_resource)(struct pci_dev *dev,
  			const struct resource *res,