From: Stephen Boyd <sboyd@codeaurora.org>
Date: Thu, 22 Oct 2015 00:28:19 +0000 (-0700)
Subject: Merge branch 'clk-iproc' into clk-next
X-Git-Tag: v4.4-rc1~115^2~7
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f63d19ef52aa66e97fca2425974845177ce02b0a;p=platform%2Fkernel%2Flinux-exynos.git

Merge branch 'clk-iproc' into clk-next

* clk-iproc:
  clk: iproc: define Broadcom NS2 iProc clock binding
  clk: iproc: define Broadcom NSP iProc clock binding
  clk: ns2: add clock support for Broadcom Northstar 2 SoC
  clk: iproc: Separate status and control variables
  clk: iproc: Split off dig_filter
  clk: iproc: Add PLL base write function
  clk: nsp: add clock support for Broadcom Northstar Plus SoC
  clk: iproc: Add PWRCTRL support
  clk: cygnus: Convert all macros to all caps
  ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
---

f63d19ef52aa66e97fca2425974845177ce02b0a
diff --cc drivers/clk/bcm/Makefile
index ee2349b,2d1cbc5..3fc9506
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@@ -3,5 -3,7 +3,8 @@@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-
  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
  obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
 +obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
+ obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-ns2.o
  obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
+ obj-$(CONFIG_ARCH_BCM_NSP)	+= clk-nsp.o
+ obj-$(CONFIG_ARCH_BCM_5301X)	+= clk-nsp.o
diff --cc drivers/clk/bcm/clk-iproc-pll.c
index d679ab8,7f7da79f..afd5891
--- a/drivers/clk/bcm/clk-iproc-pll.c
+++ b/drivers/clk/bcm/clk-iproc-pll.c
@@@ -363,22 -384,25 +384,22 @@@ static unsigned long iproc_pll_recalc_r
  	 *
  	 * ((ndiv_int + ndiv_frac / 2^20) * (parent clock rate / pdiv)
  	 */
- 	val = readl(pll->pll_base + ctrl->ndiv_int.offset);
+ 	val = readl(pll->control_base + ctrl->ndiv_int.offset);
  	ndiv_int = (val >> ctrl->ndiv_int.shift) &
  		bit_mask(ctrl->ndiv_int.width);
 -	ndiv = (u64)ndiv_int << ctrl->ndiv_int.shift;
 +	ndiv = ndiv_int << 20;
  
  	if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) {
- 		val = readl(pll->pll_base + ctrl->ndiv_frac.offset);
+ 		val = readl(pll->control_base + ctrl->ndiv_frac.offset);
  		ndiv_frac = (val >> ctrl->ndiv_frac.shift) &
  			bit_mask(ctrl->ndiv_frac.width);
 -
 -		if (ndiv_frac != 0)
 -			ndiv = ((u64)ndiv_int << ctrl->ndiv_int.shift) |
 -				ndiv_frac;
 +		ndiv += ndiv_frac;
  	}
  
- 	val = readl(pll->pll_base + ctrl->pdiv.offset);
+ 	val = readl(pll->control_base + ctrl->pdiv.offset);
  	pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width);
  
 -	clk->rate = (ndiv * parent_rate) >> ctrl->ndiv_int.shift;
 +	clk->rate = (ndiv * parent_rate) >> 20;
  
  	if (pdiv == 0)
  		clk->rate *= 2;