From: Alexander Shiyan <shc_work@mail.ru>
Date: Mon, 21 Jan 2013 15:38:56 +0000 (+0400)
Subject: serial: sccnxp: Reset break and overrun bits in RX handler
X-Git-Tag: upstream/snapshot3+hdmi~5694^2~54
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f548b96de684c86c72cd7ba019c03a7afe94fd53;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git

serial: sccnxp: Reset break and overrun bits in RX handler

This patch adds a hardware reset the break and overflow bits for
these events. Without resetting the bits they will be reported to
the core every time, when once occur.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/tty/serial/sccnxp.c b/drivers/tty/serial/sccnxp.c
index c5f0e96..c7dec16 100644
--- a/drivers/tty/serial/sccnxp.c
+++ b/drivers/tty/serial/sccnxp.c
@@ -305,14 +305,19 @@ static void sccnxp_handle_rx(struct uart_port *port)
 		if (unlikely(sr)) {
 			if (sr & SR_BRK) {
 				port->icount.brk++;
+				sccnxp_port_write(port, SCCNXP_CR_REG,
+						  CR_CMD_BREAK_RESET);
 				if (uart_handle_break(port))
 					continue;
 			} else if (sr & SR_PE)
 				port->icount.parity++;
 			else if (sr & SR_FE)
 				port->icount.frame++;
-			else if (sr & SR_OVR)
+			else if (sr & SR_OVR) {
 				port->icount.overrun++;
+				sccnxp_port_write(port, SCCNXP_CR_REG,
+						  CR_CMD_STATUS_RESET);
+			}
 
 			sr &= port->read_status_mask;
 			if (sr & SR_BRK)