From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Date: Thu, 10 Dec 2020 13:06:58 +0000 (+0100)
Subject: radv: fix TC-compat HTILE images with DST_OPTIMAL on the compute queue
X-Git-Tag: upstream/21.0.0~699
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f4f096805b08c1f00e695569f2368b319cfcc256;p=platform%2Fupstream%2Fmesa.git

radv: fix TC-compat HTILE images with DST_OPTIMAL on the compute queue

This is probably rare but can happen if someone performs a depth-stencil
copy on the compute queue. This might work (untested by CTS) but it
looks more conservative to decompress before perfoming the operation.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8039>
---

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index fe12a4e..4203f42 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1764,6 +1764,11 @@ bool radv_layout_is_htile_compressed(const struct radv_image *image,
 			return true;
 		}
 
+		if ((layout == VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL ||
+		     layout == VK_IMAGE_LAYOUT_GENERAL) &&
+		    (queue_mask & (1u << RADV_QUEUE_COMPUTE)))
+			return false;
+
 		return layout != VK_IMAGE_LAYOUT_GENERAL;
 	}