From: Biju Das <biju.das.jz@bp.renesas.com>
Date: Tue, 30 Aug 2022 16:45:16 +0000 (+0100)
Subject: dt-bindings: can: nxp,sja1000: Document RZ/N1 power-domains support
X-Git-Tag: v6.1-rc5~319^2~209^2~10
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f4dda24432d7aed7a98ffe9b76e4c20b5fe6b9c1;p=platform%2Fkernel%2Flinux-starfive.git

dt-bindings: can: nxp,sja1000: Document RZ/N1 power-domains support

Document RZ/N1 power-domains support. Also update the example with
power-domains property.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/all/20220830164518.1381632-2-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---

diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
index b1327c5..5b58872 100644
--- a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
+++ b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
@@ -30,6 +30,9 @@ properties:
   clocks:
     maxItems: 1
 
+  power-domains:
+    maxItems: 1
+
   reg-io-width:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: I/O register width (in bytes) implemented by this device
@@ -105,6 +108,7 @@ allOf:
     then:
       required:
         - clocks
+        - power-domains
 
 unevaluatedProperties: false
 
@@ -129,4 +133,5 @@ examples:
         reg-io-width = <4>;
         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
         clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
+        power-domains = <&sysctrl>;
     };