From: Roland Scheidegger <sroland@vmware.com>
Date: Mon, 29 Aug 2016 16:15:08 +0000 (+0200)
Subject: softpipe: (trivial) honor render_condition_enabled for clear_rt/clear_ds
X-Git-Tag: upstream/17.1.0~6862
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f48ccb8c075f18338d44078fa1be81a2e8a46970;p=platform%2Fupstream%2Fmesa.git

softpipe: (trivial) honor render_condition_enabled for clear_rt/clear_ds
---

diff --git a/src/gallium/drivers/softpipe/sp_surface.c b/src/gallium/drivers/softpipe/sp_surface.c
index 643b060..3908411 100644
--- a/src/gallium/drivers/softpipe/sp_surface.c
+++ b/src/gallium/drivers/softpipe/sp_surface.c
@@ -102,7 +102,7 @@ softpipe_clear_render_target(struct pipe_context *pipe,
 {
    struct softpipe_context *softpipe = softpipe_context(pipe);
 
-   if (!softpipe_check_render_cond(softpipe))
+   if (render_condition_enabled && !softpipe_check_render_cond(softpipe))
       return;
 
    util_clear_render_target(pipe, dst, color,
@@ -122,7 +122,7 @@ softpipe_clear_depth_stencil(struct pipe_context *pipe,
 {
    struct softpipe_context *softpipe = softpipe_context(pipe);
 
-   if (!softpipe_check_render_cond(softpipe))
+   if (render_condition_enabled && !softpipe_check_render_cond(softpipe))
       return;
 
    util_clear_depth_stencil(pipe, dst, clear_flags,