From: Samuel Pitoiset Date: Thu, 11 Jul 2019 09:54:24 +0000 (+0200) Subject: radv/gfx10: disable TC-compat HTILE for multisampled D32_SFLOAT format X-Git-Tag: upstream/19.3.0~4344 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f3dfdd4091dbe821f23fef7141d091f7ffc6e292;p=platform%2Fupstream%2Fmesa.git radv/gfx10: disable TC-compat HTILE for multisampled D32_SFLOAT format For some reasons D32_SFLOAT is also affected on GFX10, it works fine with previous generations. This fixes some dEQP-VK.renderpass2.depth_stencil_resolve.*. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 6245873..368bd5d 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -83,9 +83,12 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device, return false; /* FIXME: for some reason TC compat with 2/4/8 samples breaks some cts - * tests - disable for now */ + * tests - disable for now. On GFX10 D32_SFLOAT is affected as well. + */ if (pCreateInfo->samples >= 2 && - pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT) + (pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT || + (pCreateInfo->format == VK_FORMAT_D32_SFLOAT && + device->physical_device->rad_info.chip_class == GFX10))) return false; /* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only