From: Tapani Pälli Date: Tue, 12 Dec 2023 08:30:07 +0000 (+0200) Subject: anv/hasvk/drirc: change anv_assume_full_subgroups to have subgroup size X-Git-Tag: upstream/23.3.3~83 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f3d9b7dfab2776f91fa38a149ab49c5ee369e789;p=platform%2Fupstream%2Fmesa.git anv/hasvk/drirc: change anv_assume_full_subgroups to have subgroup size Cc: mesa-stable Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: (cherry picked from commit 7ff8f79a8841d439af449fac8b382070a7b76c9f) --- diff --git a/.pick_status.json b/.pick_status.json index 07a2d0f..736954d 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -594,7 +594,7 @@ "description": "anv/hasvk/drirc: change anv_assume_full_subgroups to have subgroup size", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index e887e9e..cf3876d 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -77,7 +77,7 @@ static const driOptionDescription anv_dri_options[] = { DRI_CONF_VK_X11_STRICT_IMAGE_COUNT(false) DRI_CONF_VK_KHR_PRESENT_WAIT(false) DRI_CONF_VK_XWAYLAND_WAIT_READY(true) - DRI_CONF_ANV_ASSUME_FULL_SUBGROUPS(false) + DRI_CONF_ANV_ASSUME_FULL_SUBGROUPS(0) DRI_CONF_ANV_DISABLE_FCV(false) DRI_CONF_ANV_SAMPLE_MASK_OUT_OPENGL_BEHAVIOUR(false) DRI_CONF_ANV_FP64_WORKAROUND_ENABLED(false) @@ -1580,7 +1580,7 @@ anv_init_dri_options(struct anv_instance *instance) instance->vk.app_info.engine_version); instance->assume_full_subgroups = - driQueryOptionb(&instance->dri_options, "anv_assume_full_subgroups"); + driQueryOptioni(&instance->dri_options, "anv_assume_full_subgroups"); instance->limit_trig_input_range = driQueryOptionb(&instance->dri_options, "limit_trig_input_range"); instance->sample_mask_out_opengl_behaviour = diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 52f97ae..e7f0d87 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -771,7 +771,7 @@ anv_pipeline_hash_graphics(struct anv_graphics_base_pipeline *pipeline, } if (stages[MESA_SHADER_MESH].info || stages[MESA_SHADER_TASK].info) { - const bool afs = device->physical->instance->assume_full_subgroups; + const uint8_t afs = device->physical->instance->assume_full_subgroups; _mesa_sha1_update(&ctx, &afs, sizeof(afs)); } @@ -789,7 +789,7 @@ anv_pipeline_hash_compute(struct anv_compute_pipeline *pipeline, anv_pipeline_hash_common(&ctx, &pipeline->base); - const bool afs = device->physical->instance->assume_full_subgroups; + const uint8_t afs = device->physical->instance->assume_full_subgroups; _mesa_sha1_update(&ctx, &afs, sizeof(afs)); _mesa_sha1_update(&ctx, stage->shader_sha1, @@ -1991,7 +1991,9 @@ anv_fixup_subgroup_size(struct anv_device *device, struct shader_info *info) * a size. */ if (info->subgroup_size == SUBGROUP_SIZE_FULL_SUBGROUPS) - info->subgroup_size = BRW_SUBGROUP_SIZE; + info->subgroup_size = + device->physical->instance->assume_full_subgroups != 0 ? + device->physical->instance->assume_full_subgroups : BRW_SUBGROUP_SIZE; } static void diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index d963e6e..e0e35a52 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1022,7 +1022,7 @@ struct anv_instance { /** * Workarounds for game bugs. */ - bool assume_full_subgroups; + uint8_t assume_full_subgroups; bool limit_trig_input_range; bool sample_mask_out_opengl_behaviour; bool fp64_workaround_enabled; diff --git a/src/intel/vulkan_hasvk/anv_device.c b/src/intel/vulkan_hasvk/anv_device.c index caa57a7..6935232 100644 --- a/src/intel/vulkan_hasvk/anv_device.c +++ b/src/intel/vulkan_hasvk/anv_device.c @@ -67,7 +67,7 @@ static const driOptionDescription anv_dri_options[] = { DRI_CONF_VK_X11_OVERRIDE_MIN_IMAGE_COUNT(0) DRI_CONF_VK_X11_STRICT_IMAGE_COUNT(false) DRI_CONF_VK_XWAYLAND_WAIT_READY(true) - DRI_CONF_ANV_ASSUME_FULL_SUBGROUPS(false) + DRI_CONF_ANV_ASSUME_FULL_SUBGROUPS(0) DRI_CONF_ANV_SAMPLE_MASK_OUT_OPENGL_BEHAVIOUR(false) DRI_CONF_NO_16BIT(false) DRI_CONF_SECTION_END @@ -1324,7 +1324,7 @@ anv_init_dri_options(struct anv_instance *instance) instance->vk.app_info.engine_version); instance->assume_full_subgroups = - driQueryOptionb(&instance->dri_options, "anv_assume_full_subgroups"); + driQueryOptioni(&instance->dri_options, "anv_assume_full_subgroups"); instance->limit_trig_input_range = driQueryOptionb(&instance->dri_options, "limit_trig_input_range"); instance->sample_mask_out_opengl_behaviour = diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 6df9c3f..3e0671d 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -472,7 +472,7 @@ anv_pipeline_hash_compute(struct anv_compute_pipeline *pipeline, const bool rba = device->vk.enabled_features.robustBufferAccess; _mesa_sha1_update(&ctx, &rba, sizeof(rba)); - const bool afs = device->physical->instance->assume_full_subgroups; + const uint8_t afs = device->physical->instance->assume_full_subgroups; _mesa_sha1_update(&ctx, &afs, sizeof(afs)); _mesa_sha1_update(&ctx, stage->shader_sha1, @@ -1581,7 +1581,9 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, * a size. */ if (stage.nir->info.subgroup_size == SUBGROUP_SIZE_FULL_SUBGROUPS) - stage.nir->info.subgroup_size = BRW_SUBGROUP_SIZE; + stage.nir->info.subgroup_size = + device->physical->instance->assume_full_subgroups != 0 ? + device->physical->instance->assume_full_subgroups : BRW_SUBGROUP_SIZE; stage.num_stats = 1; diff --git a/src/intel/vulkan_hasvk/anv_private.h b/src/intel/vulkan_hasvk/anv_private.h index aec64f5..6cff8e3 100644 --- a/src/intel/vulkan_hasvk/anv_private.h +++ b/src/intel/vulkan_hasvk/anv_private.h @@ -944,7 +944,7 @@ struct anv_instance { /** * Workarounds for game bugs. */ - bool assume_full_subgroups; + uint8_t assume_full_subgroups; bool limit_trig_input_range; bool sample_mask_out_opengl_behaviour; float lower_depth_range_rate; diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-mesa-defaults.conf index f5123e7..79baae3 100644 --- a/src/util/00-mesa-defaults.conf +++ b/src/util/00-mesa-defaults.conf @@ -1114,10 +1114,10 @@ TODO: document the other workarounds. - - diff --git a/src/util/driconf.h b/src/util/driconf.h index c79f969..c3e6c7f 100644 --- a/src/util/driconf.h +++ b/src/util/driconf.h @@ -693,8 +693,8 @@ */ #define DRI_CONF_ANV_ASSUME_FULL_SUBGROUPS(def) \ - DRI_CONF_OPT_B(anv_assume_full_subgroups, def, \ - "Allow assuming full subgroups requirement even when it's not specified explicitly") + DRI_CONF_OPT_I(anv_assume_full_subgroups, def, 0, 32, \ + "Allow assuming full subgroups requirement even when it's not specified explicitly and set the given size") #define DRI_CONF_ANV_SAMPLE_MASK_OUT_OPENGL_BEHAVIOUR(def) \ DRI_CONF_OPT_B(anv_sample_mask_out_opengl_behaviour, def, \