From: Gustavo A. R. Silva Date: Wed, 10 Feb 2021 21:23:30 +0000 (-0600) Subject: drm/amd/display: Fix potential integer overflow X-Git-Tag: accepted/tizen/unified/20230118.172025~7243^2~19^2~445 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f2d51b20d747e027e81ab3c3f24a6c833ada3fb3;p=platform%2Fkernel%2Flinux-rpi.git drm/amd/display: Fix potential integer overflow Fix potential integer overflow by casting actual_calculated_clock_100hz to u64, in order to give the compiler complete information about the proper arithmetic to use. Notice that such variable is used in a context that expects an expression of type u64 (64 bits, unsigned) and the following expression is currently being evaluated using 32-bit arithmetic: actual_calculated_clock_100hz * post_divider Fixes: 7a03fdf628af ("drm/amd/display: fix 64bit division issue on 32bit OS") Addresses-Coverity-ID: 1501691 ("Unintentional integer overflow") Signed-off-by: Gustavo A. R. Silva Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index bc94272..dec58b3 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c @@ -240,7 +240,7 @@ static bool calc_fb_divider_checking_tolerance( pll_settings->calculated_pix_clk_100hz = actual_calculated_clock_100hz; pll_settings->vco_freq = - div_u64(actual_calculated_clock_100hz * post_divider, 10); + div_u64((u64)actual_calculated_clock_100hz * post_divider, 10); return true; } return false;