From: Andrzej Hajda <a.hajda@samsung.com>
Date: Tue, 11 Apr 2017 11:17:37 +0000 (+0200)
Subject: drm/exynos/hdmi: expose HDMI-PHY clock as pipeline clock
X-Git-Tag: submit/tizen/20170421.012531~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f29fb5e403ce7d30dcb542cc8a3e46ae98cf052c;p=platform%2Fkernel%2Flinux-exynos.git

drm/exynos/hdmi: expose HDMI-PHY clock as pipeline clock

HDMI-PHY clock should be accessible from other components in the pipeline.

Change-Id: I17fa9cc3260ad33358dcf355e804de3ef4b4b19f
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index f3e3cd728f2a..b5f437cd9d17 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -137,6 +137,7 @@ struct hdmi_context {
 	struct clk			**clk_muxes;
 	struct regulator_bulk_data	regul_bulk[ARRAY_SIZE(supply)];
 	struct regulator		*reg_hdmi_en;
+	struct exynos_drm_clk		phy_clk;
 };
 
 static inline struct hdmi_context *display_to_hdmi(struct exynos_drm_display *d)
@@ -1755,6 +1756,17 @@ static int hdmi_clk_init(struct hdmi_context *hdata)
 	return ret;
 }
 
+static void hdmiphy_clk_enable(struct exynos_drm_clk *clk, bool enable)
+{
+	struct hdmi_context *hdata = container_of(clk, struct hdmi_context,
+						  phy_clk);
+
+	if (enable)
+		hdmiphy_enable(hdata);
+	else
+		hdmi_poweroff(hdata);
+}
+
 static int hdmi_bridge_init(struct hdmi_context *hdata)
 {
 	struct device *dev = hdata->dev;
@@ -1854,9 +1866,20 @@ static int hdmi_bind(struct device *dev, struct device *master, void *data)
 {
 	struct drm_device *drm_dev = data;
 	struct hdmi_context *hdata = dev_get_drvdata(dev);
+	int ret;
 
 	hdata->drm_dev = drm_dev;
 
+	hdata->phy_clk.enable = hdmiphy_clk_enable;
+
+	ret = exynos_drm_crtc_get_pipe_from_type(drm_dev, hdata->display.type);
+	if (ret >= 0) {
+		struct exynos_drm_private *private = drm_dev->dev_private;
+		struct exynos_drm_crtc *crtc = to_exynos_crtc(private->crtc[ret]);
+
+		crtc->pipe_clk = &hdata->phy_clk;
+	}
+
 	return exynos_drm_create_enc_conn(drm_dev, &hdata->display);
 }