From: Thierry Reding Date: Mon, 30 Sep 2013 13:14:41 +0000 (+0200) Subject: drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30} X-Git-Tag: v3.13-rc1~69^2~66^2~18 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f27db9615ad6c0bad6047d0592cfc627b9997f8a;p=profile%2Fcommon%2Fkernel-common.git drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30} Everything related to Tegra uses Tegra20 and Tegra30 instead of Tegra2 and Tegra3, respectively. Rename the TMDS arrays in the HDMI driver for consistency. Signed-off-by: Thierry Reding --- diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c index 3a00cb0..ed7c58f 100644 --- a/drivers/gpu/drm/tegra/hdmi.c +++ b/drivers/gpu/drm/tegra/hdmi.c @@ -144,7 +144,7 @@ struct tmds_config { u32 drive_current; }; -static const struct tmds_config tegra2_tmds_config[] = { +static const struct tmds_config tegra20_tmds_config[] = { { /* slow pixel clock modes */ .pclk = 27000000, .pll0 = SOR_PLL_BG_V17_S(3) | SOR_PLL_ICHPMP(1) | @@ -177,7 +177,7 @@ static const struct tmds_config tegra2_tmds_config[] = { }, }; -static const struct tmds_config tegra3_tmds_config[] = { +static const struct tmds_config tegra30_tmds_config[] = { { /* 480p modes */ .pclk = 27000000, .pll0 = SOR_PLL_BG_V17_S(3) | SOR_PLL_ICHPMP(1) | @@ -704,11 +704,11 @@ static int tegra_output_hdmi_enable(struct tegra_output *output) /* TMDS CONFIG */ if (of_device_is_compatible(node, "nvidia,tegra30-hdmi")) { - num_tmds = ARRAY_SIZE(tegra3_tmds_config); - tmds = tegra3_tmds_config; + num_tmds = ARRAY_SIZE(tegra30_tmds_config); + tmds = tegra30_tmds_config; } else { - num_tmds = ARRAY_SIZE(tegra2_tmds_config); - tmds = tegra2_tmds_config; + num_tmds = ARRAY_SIZE(tegra20_tmds_config); + tmds = tegra20_tmds_config; } for (i = 0; i < num_tmds; i++) {