From: Craig Topper <craig.topper@intel.com>
Date: Wed, 23 Sep 2020 17:20:03 +0000 (-0700)
Subject: [X86] Improve demanded bits for X86ISD::BEXTR.
X-Git-Tag: llvmorg-13-init~11140
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f21f835ee8e52f128281697d66f8b11a50a6d5dd;p=platform%2Fupstream%2Fllvm.git

[X86] Improve demanded bits for X86ISD::BEXTR.

If the control is constant we can figure out exactly which bits
of the input are demanded.

Differential Revision: https://reviews.llvm.org/D88072
---

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1449490..ceba7f7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -38332,6 +38332,25 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
             Op, TLO.DAG.getNode(X86ISD::BEXTR, DL, VT, Op0,
                                 TLO.DAG.getConstant(MaskedVal1, DL, VT)));
       }
+
+      unsigned Shift = Cst1->getAPIntValue().extractBitsAsZExtValue(8, 0);
+      unsigned Length = Cst1->getAPIntValue().extractBitsAsZExtValue(8, 8);
+
+      // If the length is 0, the result is 0.
+      if (Length == 0) {
+        Known.setAllZero();
+        return false;
+      }
+
+      if ((Shift + Length) <= BitWidth) {
+        APInt DemandedMask = APInt::getBitsSet(BitWidth, Shift, Shift + Length);
+        if (SimplifyDemandedBits(Op0, DemandedMask, Known, TLO, Depth + 1))
+          return true;
+
+        Known = Known.extractBits(Length, Shift);
+        Known = Known.zextOrTrunc(BitWidth);
+        return false;
+      }
     }
 
     KnownBits Known1;
diff --git a/llvm/test/CodeGen/X86/tbm-intrinsics.ll b/llvm/test/CodeGen/X86/tbm-intrinsics.ll
index 219b6dd..2707d04 100644
--- a/llvm/test/CodeGen/X86/tbm-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/tbm-intrinsics.ll
@@ -61,3 +61,18 @@ entry:
   %2 = select i1 %1, i32 %b, i32 %0
   ret i32 %2
 }
+
+define i32 @test_x86_tbm_bextri_demandedbits(i32 %x) nounwind readonly {
+; X86-LABEL: test_x86_tbm_bextri_demandedbits:
+; X86:       # %bb.0:
+; X86-NEXT:    bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
+; X86-NEXT:    retl
+;
+; X64-LABEL: test_x86_tbm_bextri_demandedbits:
+; X64:       # %bb.0:
+; X64-NEXT:    bextrl $3841, %edi, %eax # imm = 0xF01
+; X64-NEXT:    retq
+  %a = or i32 %x, 4294901761
+  %b = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 3841)
+  ret i32 %b
+}