From: Minkyu Kang <mk7.kang@samsung.com>
Date: Mon, 1 Jun 2009 01:12:49 +0000 (+0900)
Subject: [S5PC100] clock 0 div setting
X-Git-Tag: s5pc110_universal_support~249
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f18f8c9f66725105e27305ec0fb6141e0c579b6d;p=kernel%2Fu-boot.git

[S5PC100] clock 0 div setting
at now, onenand boot is available

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/board/samsung/tickertape/lowlevel_init.S b/board/samsung/tickertape/lowlevel_init.S
index 8e8c6a9..e9635fb 100644
--- a/board/samsung/tickertape/lowlevel_init.S
+++ b/board/samsung/tickertape/lowlevel_init.S
@@ -189,6 +189,10 @@ system_clock_init:
 	ldr r1, =0x1		@ UART ratio set 1 -> 2
 	str r1, [r0]
 
+	ldr r0, =S5P_CLK_DIV0
+	ldr r1, =0x11301
+	str r1, [r0]
+
 	/* APLL Enable */
 	ldr r0, =S5P_APLL_LOCK	
 	ldr r1, =0xe10		@ Locktime : 0xe10 = 3600