From: Tang Yuantian Date: Mon, 8 Aug 2016 07:07:19 +0000 (+0800) Subject: armv8: fsl-lsch2: adjust sata parameter X-Git-Tag: v2016.11-rc2~16^2~25 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f0beb49290c4e6af7d88895a15a45bbea38318fe;p=platform%2Fkernel%2Fu-boot.git armv8: fsl-lsch2: adjust sata parameter The default values for Port Phy2Cfg register and Port Phy3Cfg register are better, no need to overwrite them. Signed-off-by: Tang Yuantian Reviewed-by: York Sun --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 463d1e3..4b425b8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -233,8 +233,6 @@ int sata_init(void) out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000); #endif out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG); out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); ahci_init((void __iomem *)CONFIG_SYS_SATA); diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 4512732..0729b7f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -60,8 +60,6 @@ struct cpu_type { /* ahci port register default value */ #define AHCI_PORT_PHY_1_CFG 0xa003fffe -#define AHCI_PORT_PHY_2_CFG 0x28184d1f -#define AHCI_PORT_PHY_3_CFG 0x0e081509 #define AHCI_PORT_TRANS_CFG 0x08000029 /* AHCI (sata) register map */