From: Paul Burton <paul.burton@mips.com>
Date: Tue, 1 Oct 2019 21:53:06 +0000 (+0000)
Subject: MIPS: Use compact branch for LL/SC loops on MIPSr6+
X-Git-Tag: v5.10.7~3549^2~106
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ef85d057a605c36063a15345be87a45e0affba88;p=platform%2Fkernel%2Flinux-rpi.git

MIPS: Use compact branch for LL/SC loops on MIPSr6+

When targeting MIPSr6 or higher make use of a compact branch in LL/SC
loops, preventing the insertion of a delay slot nop that only serves to
waste space.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
---

diff --git a/arch/mips/include/asm/llsc.h b/arch/mips/include/asm/llsc.h
index 9b19f38..d240a4a 100644
--- a/arch/mips/include/asm/llsc.h
+++ b/arch/mips/include/asm/llsc.h
@@ -9,6 +9,8 @@
 #ifndef __ASM_LLSC_H
 #define __ASM_LLSC_H
 
+#include <asm/isa-rev.h>
+
 #if _MIPS_SZLONG == 32
 #define SZLONG_LOG 5
 #define SZLONG_MASK 31UL
@@ -32,6 +34,8 @@
  */
 #if R10000_LLSC_WAR
 # define __SC_BEQZ "beqzl	"
+#elif MIPS_ISA_REV >= 6
+# define __SC_BEQZ "beqzc	"
 #else
 # define __SC_BEQZ "beqz	"
 #endif