From: Chris Wilson Date: Wed, 6 Nov 2013 08:56:01 +0000 (+0000) Subject: sna: Be more pessimistic for tiling sizes on older gen X-Git-Tag: 2.99.906~30 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ef842d2ceee4d1ccf8a0f8a81530dc8be8e18b44;p=platform%2Fupstream%2Fxf86-video-intel.git sna: Be more pessimistic for tiling sizes on older gen On the older generation, we have severe alignment penalties for fenced regions which dramatically reduce the amount of space we can effectively use in a batch. To accommodate this, reduce the tiling step size. Signed-off-by: Chris Wilson --- diff --git a/src/sna/sna_tiling.c b/src/sna/sna_tiling.c index b0a48dd..d23fb00 100644 --- a/src/sna/sna_tiling.c +++ b/src/sna/sna_tiling.c @@ -718,8 +718,6 @@ bool sna_tiling_blt_copy_boxes(struct sna *sna, uint8_t alu, } if (max_size > sna->kgem.max_copy_tile_size) max_size = sna->kgem.max_copy_tile_size; - if (sna->kgem.gen < 033) - max_size /= 2; /* accommodate fence alignment */ pixman_region_init_rects(®ion, box, nbox); @@ -729,6 +727,8 @@ bool sna_tiling_blt_copy_boxes(struct sna *sna, uint8_t alu, step /= 2; while (step * step * 4 > max_size) step /= 2; + if (sna->kgem.gen < 033) + step /= 2; /* accommodate severe fence restrictions */ if (step == 0) { DBG(("%s: tiles cannot fit into aperture\n", __FUNCTION__)); return false;