From: Masahiro Yamada Date: Wed, 10 Aug 2016 07:08:48 +0000 (+0900) Subject: ARM: uniphier: add uniphier_cache_set_active_ways() X-Git-Tag: v2016.09-rc2~75^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ee9bc77f3abe316126c2413c77dddac2401214a8;p=platform%2Fkernel%2Fu-boot.git ARM: uniphier: add uniphier_cache_set_active_ways() This outer cache allows to control active ways independently for each CPU, so this function will be useful to set up active ways for a specific CPU. Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c index f1a36ed..658969b 100644 --- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c +++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c @@ -192,6 +192,26 @@ void uniphier_cache_inv_way(u32 ways) UNIPHIER_SSCOQM_CM_INV); } +void uniphier_cache_set_active_ways(int cpu, u32 active_ways) +{ + void __iomem *base = (void __iomem *)UNIPHIER_SSCC + 0xc00; + + switch (readl(UNIPHIER_SSCID)) { /* revision */ + case 0x11: /* sLD3 */ + base = (void __iomem *)UNIPHIER_SSCC + 0x870; + break; + case 0x12: /* LD4 */ + case 0x16: /* sld8 */ + base = (void __iomem *)UNIPHIER_SSCC + 0x840; + break; + default: + base = (void __iomem *)UNIPHIER_SSCC + 0xc00; + break; + } + + writel(active_ways, base + 4 * cpu); +} + static void uniphier_cache_endisable(int enable) { u32 tmp; @@ -260,7 +280,7 @@ void v7_outer_cache_inval_range(u32 start, u32 end) void v7_outer_cache_enable(void) { - writel(U32_MAX, UNIPHIER_SSCLPDAWCR); /* activate all ways */ + uniphier_cache_set_active_ways(0, U32_MAX); /* activate all ways */ uniphier_cache_enable(); } diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.h b/arch/arm/mach-uniphier/arm32/cache-uniphier.h index e095e68..493d66c 100644 --- a/arch/arm/mach-uniphier/arm32/cache-uniphier.h +++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.h @@ -14,6 +14,7 @@ void uniphier_cache_prefetch_range(u32 start, u32 end, u32 ways); void uniphier_cache_touch_range(u32 start, u32 end, u32 ways); void uniphier_cache_touch_zero_range(u32 start, u32 end, u32 ways); void uniphier_cache_inv_way(u32 ways); +void uniphier_cache_set_active_ways(int cpu, u32 active_ways); void uniphier_cache_enable(void); void uniphier_cache_disable(void);