From: Chris Wilson Date: Thu, 12 Sep 2019 13:23:13 +0000 (+0100) Subject: drm/i915/tgl: Disable preemption while being debugged X-Git-Tag: v5.15~4946^2~43^2~170 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ee73e2795b416b829f0e00e7c43154922dff495b;p=platform%2Fkernel%2Flinux-starfive.git drm/i915/tgl: Disable preemption while being debugged We see failures where the context continues executing past a preemption event, eventually leading to situations where a request has executed before we have event submitted it to HW! It seems like tgl is ignoring our RING_TAIL updates, but more likely is that there is a missing update required for our semaphore waits around preemption. v2: And disable internal semaphore usage Signed-off-by: Chris Wilson Cc: Mika Kuoppala Acked-by: Mika Kuoppala Link: https://patchwork.freedesktop.org/patch/msgid/20190912132313.12751-1-chris@chris-wilson.co.uk --- diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 47d766c..a3f0e49 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -2939,6 +2939,9 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine) engine->flags |= I915_ENGINE_HAS_PREEMPTION; } + if (INTEL_GEN(engine->i915) >= 12) /* XXX disabled for debugging */ + engine->flags &= ~I915_ENGINE_HAS_SEMAPHORES; + if (engine->class != COPY_ENGINE_CLASS && INTEL_GEN(engine->i915) >= 12) engine->flags |= I915_ENGINE_HAS_RELATIVE_MMIO; } diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 6981162..9236fcc 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -798,6 +798,7 @@ static const struct intel_device_info intel_tigerlake_12_info = { .engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), .has_rc6 = false, /* XXX disabled for debugging */ + .has_logical_ring_preemption = false, /* XXX disabled for debugging */ }; #undef GEN