From: Craig Topper <craig.topper@intel.com>
Date: Wed, 11 Apr 2018 01:09:10 +0000 (+0000)
Subject: [X86] In X86FlagsCopyLowering, when rewriting a memory setcc we need to emit an expli... 
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ee2c1dea4d9bb318da8af18d1bfadad8f7ce8013;p=platform%2Fupstream%2Fllvm.git

[X86] In X86FlagsCopyLowering, when rewriting a memory setcc we need to emit an explicit MOV8mr instruction.

Previously the code only knew how to handle setcc to a register.

This should fix a crash in the chromium build.

llvm-svn: 329771
---

diff --git a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
index 1f4bd7f..a101f6b 100644
--- a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+++ b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
@@ -727,8 +727,27 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB,
   if (!CondReg)
     CondReg = promoteCondToReg(TestMBB, TestPos, TestLoc, Cond);
 
-  // Rewriting this is trivial: we just replace the register and remove the
-  // setcc.
-  MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
+  // Rewriting a register def is trivial: we just replace the register and
+  // remove the setcc.
+  if (!SetCCI.mayStore()) {
+    assert(SetCCI.getOperand(0).isReg() &&
+           "Cannot have a non-register defined operand to SETcc!");
+    MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);
+    SetCCI.eraseFromParent();
+    return;
+  }
+
+  // Otherwise, we need to emit a store.
+  auto MIB = BuildMI(*SetCCI.getParent(), SetCCI.getIterator(),
+                     SetCCI.getDebugLoc(), TII->get(X86::MOV8mr));
+  // Copy the address operands.
+  for (int i = 0; i < X86::AddrNumOperands; ++i)
+    MIB.add(SetCCI.getOperand(i));
+
+  MIB.addReg(CondReg);
+
+  MIB->setMemRefs(SetCCI.memoperands_begin(), SetCCI.memoperands_end());
+
   SetCCI.eraseFromParent();
+  return;
 }
diff --git a/llvm/test/CodeGen/X86/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
index fd263c0..b6f79db 100644
--- a/llvm/test/CodeGen/X86/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
@@ -208,11 +208,10 @@ body:             |
     %3:gr8 = SETAr implicit $eflags
     %4:gr8 = SETBr implicit $eflags
     %5:gr8 = SETEr implicit $eflags
-    %6:gr8 = SETNEr implicit killed $eflags
+    SETNEm $rsp, 1, $noreg, -16, $noreg, implicit killed $eflags
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %3
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %4
     MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %5
-    MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %6
   ; CHECK-NOT:     $eflags =
   ; CHECK-NOT:             = SET{{.*}}
   ; CHECK:         MOV8mr {{.*}}, killed %[[A_REG]]