From: Anuj Phogat <anuj.phogat@gmail.com>
Date: Mon, 9 Sep 2019 18:32:35 +0000 (-0700)
Subject: genxml/gen11+: Add COMMON_SLICE_CHICKEN4 register
X-Git-Tag: upstream/19.3.0~2006
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ee2bde5232b0b703db5482b65b42bc6cbf29bb8f;p=platform%2Fupstream%2Fmesa.git

genxml/gen11+: Add COMMON_SLICE_CHICKEN4 register

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index 2b34acc..67ba1f7 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -6914,6 +6914,11 @@
     <field name="PS Thread Panic Dispatch Mask" start="22" end="23" type="uint"/>
   </register>
 
+  <register name="COMMON_SLICE_CHICKEN4" length="1" num="0x7300">
+    <field name="Enable Hardware Filtering in WM" start="5" end="5" type="bool"/>
+    <field name="Enable Hardware Filtering in WM Mask" start="21" end="21" type="bool"/>
+  </register>
+
   <register name="CS_CHICKEN1" length="1" num="0x2580">
     <field name="Replay Mode" start="0" end="0" type="uint">
       <value name="Mid-cmdbuffer Preemption" value="0"/>
diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml
index 599b348..ac24d53 100644
--- a/src/intel/genxml/gen12.xml
+++ b/src/intel/genxml/gen12.xml
@@ -6914,6 +6914,11 @@
     <field name="PS Thread Panic Dispatch Mask" start="22" end="23" type="uint"/>
   </register>
 
+  <register name="COMMON_SLICE_CHICKEN4" length="1" num="0x7300">
+    <field name="Enable Hardware Filtering in WM" start="5" end="5" type="bool"/>
+    <field name="Enable Hardware Filtering in WM Mask" start="21" end="21" type="bool"/>
+  </register>
+
   <register name="CS_CHICKEN1" length="1" num="0x2580">
     <field name="Replay Mode" start="0" end="0" type="uint">
       <value name="Mid-cmdbuffer Preemption" value="0"/>