From: Jason Ekstrand Date: Fri, 2 Jun 2017 17:05:21 +0000 (-0700) Subject: i965/miptree: Choose the stencil layout in miptree_create_layout X-Git-Tag: upstream/18.1.0~8786 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ee0e29dd0274038957af4ac62b5ffab8d2a25704;p=platform%2Fupstream%2Fmesa.git i965/miptree: Choose the stencil layout in miptree_create_layout This ensures that we get the correct layout for all stencil buffers, not just those which are created as separate stencil for a depth buffer. Reviewed-by: Samuel Iglesias Gonsálvez --- diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index bd81681..2821549 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -333,6 +333,9 @@ intel_miptree_create_layout(struct brw_context *brw, mt->msaa_layout = INTEL_MSAA_LAYOUT_NONE; mt->refcount = 1; + if (brw->gen == 6 && format == MESA_FORMAT_S_UINT8) + layout_flags |= MIPTREE_LAYOUT_GEN6_HIZ_STENCIL; + int depth_multiply = 1; if (num_samples > 1) { /* Adjust width/height/depth for MSAA */ @@ -463,8 +466,7 @@ intel_miptree_create_layout(struct brw_context *brw, intel_miptree_wants_hiz_buffer(brw, mt)))) { uint32_t stencil_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD; if (brw->gen == 6) { - stencil_flags |= MIPTREE_LAYOUT_GEN6_HIZ_STENCIL | - MIPTREE_LAYOUT_TILING_ANY; + stencil_flags |= MIPTREE_LAYOUT_TILING_ANY; } mt->stencil_mt = intel_miptree_create(brw,