From: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Fri, 18 Nov 2016 03:40:29 +0000 (-0500)
Subject: swr: [rasterizer memory] minify texture width before alignment
X-Git-Tag: upstream/17.1.0~4479
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ee0b6597a9579342029e46bf2bc4a8dd887f7896;p=platform%2Fupstream%2Fmesa.git

swr: [rasterizer memory] minify texture width before alignment

The minification should happen before alignment, not after. See similar
logic on ComputeLODOffsetY. The current logic requires unnecessarily
large textures when there's an initial NPOT size.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
---

diff --git a/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h b/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
index 11ed451..350e44b 100644
--- a/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
+++ b/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h
@@ -284,8 +284,8 @@ INLINE void ComputeLODOffset1D(
         offset = GFX_ALIGN(curWidth, hAlign);
         for (uint32_t l = 1; l < lod; ++l)
         {
-            curWidth = GFX_ALIGN(std::max<uint32_t>(curWidth >> 1, 1U), hAlign);
-            offset += curWidth;
+            curWidth = std::max<uint32_t>(curWidth >> 1, 1U);
+            offset += GFX_ALIGN(curWidth, hAlign);
         }
 
         if (info.isSubsampled || info.isBC)