From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Mon, 20 Jun 2022 07:19:35 +0000 (+0300)
Subject: arm64: dts: qcom: msm8996: add GCC's optional clock sources
X-Git-Tag: v6.6.17~6969^2~14^2~28
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=edb8e38ca99f198b59c967c9e26719198cea8bf8;p=platform%2Fkernel%2Flinux-rpi.git

arm64: dts: qcom: msm8996: add GCC's optional clock sources

Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS
symbol clocks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620071936.1558906-4-dmitry.baryshkov@linaro.org
---

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 469a6bc..004dff3 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -690,8 +690,22 @@
 
 			clocks = <&rpmcc RPM_SMD_BB_CLK1>,
 				 <&rpmcc RPM_SMD_LN_BB_CLK>,
-				 <&sleep_clk>;
-			clock-names = "cxo", "cxo2", "sleep_clk";
+				 <&sleep_clk>,
+				 <&pciephy_0>,
+				 <&pciephy_1>,
+				 <&pciephy_2>,
+				 <&ssusb_phy_0>,
+				 <0>, <0>, <0>;
+			clock-names = "cxo",
+				      "cxo2",
+				      "sleep_clk",
+				      "pcie_0_pipe_clk_src",
+				      "pcie_1_pipe_clk_src",
+				      "pcie_2_pipe_clk_src",
+				      "usb3_phy_pipe_clk_src",
+				      "ufs_rx_symbol_0_clk_src",
+				      "ufs_rx_symbol_1_clk_src",
+				      "ufs_tx_symbol_0_clk_src";
 		};
 
 		bimc: interconnect@408000 {