From: Сергей Баранников/AI Tools Lab /SRR/Engineer/삼성전자 <s.barannikov@samsung.com>
Date: Wed, 4 Sep 2019 15:38:37 +0000 (+0300)
Subject: [nnc] Change type of strides argument (#7177)
X-Git-Tag: accepted/tizen/unified/20190911.111615~133
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ed182af8bc31ef50b5b225e0c535bd866c163e01;p=platform%2Fcore%2Fml%2Fnnfw.git

[nnc] Change type of strides argument (#7177)

Change the type of `strides` argument of `Conv2D` and `DepthwiseConv2D` operations to `vector<int32_t>`.

Signed-off-by: Sergei Barannikov <s.barannikov@samsung.com>
---

diff --git a/compiler/nnc/passes/interpreter/ops/DeConv2D.cpp b/compiler/nnc/passes/interpreter/ops/DeConv2D.cpp
index 31f743a..dfc864b 100644
--- a/compiler/nnc/passes/interpreter/ops/DeConv2D.cpp
+++ b/compiler/nnc/passes/interpreter/ops/DeConv2D.cpp
@@ -31,7 +31,7 @@ using namespace mir::ops;
 
 std::vector<mir::TensorVariant> nnc::DeConv2D::operator()()
 {
-  const auto &strides = _op.getStrides();
+  const Shape &strides = _op.getStrides();
   Shape out_shape = _op.getOutputShape(0);
   auto res = allocate_tensor(out_shape);
   Tensor<float> res_accesor(res);
diff --git a/compiler/nnc/unittests/acl_backend/MIRToDOM.cpp b/compiler/nnc/unittests/acl_backend/MIRToDOM.cpp
index 0987267..1eb974b 100644
--- a/compiler/nnc/unittests/acl_backend/MIRToDOM.cpp
+++ b/compiler/nnc/unittests/acl_backend/MIRToDOM.cpp
@@ -282,13 +282,13 @@ TEST(acl_backend_mir_to_dom, conv2d)
 {
   const int32_t channels = 3;
   mir::Shape kernel_shape{1, 3, 3, channels}; // output Channels, Height, Width, input Channels
-  mir::Shape strides{1, 1};
   mir::TensorVariant kernel_tensor = createTensorVariant(kernel_shape);
 
   Graph g;
   OpConstructor op_generator =
-      [kernel_tensor, strides](mir::Graph &g, const std::vector<mir::Operation::Output *> &inputs) {
-        std::vector<int32_t> padding{0, 0};
+      [kernel_tensor](mir::Graph &g, const std::vector<mir::Operation::Output *> &inputs) {
+        vector<int32_t> strides{1, 1};
+        vector<int32_t> padding{0, 0};
         auto kernel = g.create<mir::ops::ConstantOp>(kernel_tensor)->getOutput(0);
         return g.create<mir::ops::Conv2DOp>(inputs[0], kernel, strides, padding, padding);
       };
@@ -309,13 +309,13 @@ TEST(acl_backend_mir_to_dom, depthwise_conv)
 {
   const int32_t channels = 3;
   mir::Shape kernel_shape{3, 3, channels, 1}; // Height, Width, Channels, Channel multiplier
-  mir::Shape strides{1, 1};
   mir::TensorVariant kernel_tensor = createTensorVariant(kernel_shape);
 
   Graph g;
   OpConstructor op_generator =
-      [kernel_tensor, strides](mir::Graph &g, const std::vector<mir::Operation::Output *> &inputs) {
-        std::vector<int32_t> padding{0, 0};
+      [kernel_tensor](mir::Graph &g, const std::vector<mir::Operation::Output *> &inputs) {
+        vector<int32_t> strides{1, 1};
+        vector<int32_t> padding{0, 0};
         auto kernel = g.create<mir::ops::ConstantOp>(kernel_tensor)->getOutput(0);
         return g.create<mir::ops::DepthwiseConv2DOp>(inputs[0], kernel, strides, padding, padding);
       };
diff --git a/compiler/nnc/unittests/optimizations/FuseArithmeticOps.cpp b/compiler/nnc/unittests/optimizations/FuseArithmeticOps.cpp
index 7b8886c..75cfaac 100644
--- a/compiler/nnc/unittests/optimizations/FuseArithmeticOps.cpp
+++ b/compiler/nnc/unittests/optimizations/FuseArithmeticOps.cpp
@@ -38,8 +38,9 @@ TEST(OptPass, fuseConvBiasScaleScaleBias)
   // Create graph: 'input->conv->bias->scale->scale->bias'
   auto input = g.create<ops::InputOp>(Shape{1, 299, 299, 3});
   auto conv_const = g.create<ops::ConstantOp>(TensorVariant(DataType::FLOAT32, {10, 3, 3, 3}));
-  std::vector<int32_t> padding{0, 0};
-  auto conv = g.create<ops::Conv2DOp>(input->getOutput(0), conv_const->getOutput(0), Shape{1, 1},
+  const std::vector<std::int32_t> strides{1, 1};
+  const std::vector<std::int32_t> padding{0, 0};
+  auto conv = g.create<ops::Conv2DOp>(input->getOutput(0), conv_const->getOutput(0), strides,
                                       padding, padding);
   auto bias1_const = g.create<ops::ConstantOp>(TensorVariant(DataType::FLOAT32, {10}));
   auto bias1 = g.create<ops::AddOp>(conv->getOutput(0), bias1_const->getOutput(0));
diff --git a/compiler/nnc/unittests/soft_backend/CPPOperations.cpp b/compiler/nnc/unittests/soft_backend/CPPOperations.cpp
index 5576a5b..350a3e8 100644
--- a/compiler/nnc/unittests/soft_backend/CPPOperations.cpp
+++ b/compiler/nnc/unittests/soft_backend/CPPOperations.cpp
@@ -547,7 +547,7 @@ TEST(cpp_operations_test, convTransposed2d)
             {
               vector<int> input_shape_data{3, 9, 3, static_cast<int>(input_c)}; // NHWC
               vector<int> kernel_shape_data{kernel_h, kernel_w, output_c, input_c};
-              mir::Shape strides{stride_h, stride_w};
+              vector<int32_t> strides{stride_h, stride_w};
               vector<unique_ptr<mir::TensorVariant>> input_ntensors(2);
               Tensor input_atensor0;
               Tensor input_atensor1;
@@ -582,7 +582,7 @@ TEST(cpp_operations_test, conv2d)
             {
               vector<int> input_shape_data{3, 5, 7, static_cast<int>(input_c)};     // NHWC
               vector<int> kernel_shape_data{output_c, kernel_h, kernel_w, input_c}; // OHWI
-              mir::Shape strides{stride_h, stride_w};
+              vector<int32_t> strides{stride_h, stride_w};
               vector<unique_ptr<mir::TensorVariant>> input_ntensors(2);
               Tensor input_atensor0;
               Tensor input_atensor1;
@@ -618,7 +618,7 @@ TEST(cpp_operations_test, depthwise_conv)
             {
               vector<int> input_shape_data{3, 7, 6, static_cast<int>(channels)};       // NHWC
               vector<int> kernel_shape_data{kernel_h, kernel_w, channels, multiplier}; // HWCN
-              mir::Shape strides{stride_h, stride_w};
+              vector<int32_t> strides{stride_h, stride_w};
               vector<unique_ptr<mir::TensorVariant>> input_ntensors(2);
               Tensor input_atensor0;
               Tensor input_atensor1;