From: Tim Northover Date: Sun, 4 Aug 2013 09:35:57 +0000 (+0000) Subject: X86: correct tail return address calculation X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ecc018c7b750289511052ee5d83c40a574e499ac;p=platform%2Fupstream%2Fllvm.git X86: correct tail return address calculation Due to the weird and wondeful usual arithmetic conversions, some calculations involving negative values were getting performed in uint32_t and then promoted to int64_t, which is really not a good idea. Patch by Katsuhiro Ueno. llvm-svn: 187703 --- diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp index 5db431b..b994e67 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -1323,7 +1323,7 @@ X86FrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, unsigned SlotSize = RegInfo->getSlotSize(); X86MachineFunctionInfo *X86FI = MF.getInfo(); - int32_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); + int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); if (TailCallReturnAddrDelta < 0) { // create RETURNADDR area @@ -1336,7 +1336,7 @@ X86FrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // } // [EBP] MFI->CreateFixedObject(-TailCallReturnAddrDelta, - (-1U*SlotSize)+TailCallReturnAddrDelta, true); + TailCallReturnAddrDelta - SlotSize, true); } if (hasFP(MF)) { diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1f6c330..dc56547 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2456,7 +2456,8 @@ EmitTailCallStoreRetAddr(SelectionDAG & DAG, MachineFunction &MF, if (!FPDiff) return Chain; // Calculate the new stack slot for the return address. int NewReturnAddrFI = - MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize, false); + MF.getFrameInfo()->CreateFixedObject(SlotSize, (int64_t)FPDiff - SlotSize, + false); SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, PtrVT); Chain = DAG.getStore(Chain, dl, RetAddrFrIdx, NewRetAddrFrIdx, MachinePointerInfo::getFixedStack(NewReturnAddrFI), @@ -3323,7 +3324,8 @@ SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const { if (ReturnAddrIndex == 0) { // Set up a frame object for the return address. unsigned SlotSize = RegInfo->getSlotSize(); - ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(SlotSize, -SlotSize, + ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(SlotSize, + -(int64_t)SlotSize, false); FuncInfo->setRAIndex(ReturnAddrIndex); } diff --git a/llvm/test/CodeGen/X86/tailcall-calleesave.ll b/llvm/test/CodeGen/X86/tailcall-calleesave.ll new file mode 100644 index 0000000..2770d05 --- /dev/null +++ b/llvm/test/CodeGen/X86/tailcall-calleesave.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=x86 -tailcallopt < %s | FileCheck %s + +target triple = "i686-apple-darwin" + +declare fastcc void @foo(i32, i32, i32, i32, i32, i32) +declare i32* @bar(i32*) + +define fastcc void @hoge(i32 %b) nounwind { +; Do not overwrite pushed callee-save registers +; CHECK: pushl +; CHECK: subl $[[SIZE:[0-9]+]], %esp +; CHECK-NOT: [[SIZE]](%esp) + %a = alloca i32 + store i32 0, i32* %a + %d = tail call i32* @bar(i32* %a) nounwind + store i32 %b, i32* %d + tail call fastcc void @foo(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) nounwind + ret void +}