From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Sun, 16 Apr 2023 12:37:29 +0000 (+0200)
Subject: arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency
X-Git-Tag: v6.6.17~4534^2~20^2~36
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ec888e6cff94af8fc5889824d98b1f1df65f3131;p=platform%2Fkernel%2Flinux-rpi.git

arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency

The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards
to define frequency.  Use the same as in MTP8550 to fix:

  sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org
---

diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index ade6ba5..8669d29 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -521,6 +521,10 @@
 	vdd3-supply = <&vreg_l5b_3p1>;
 };
 
+&pcie_1_phy_aux_clk {
+	clock-frequency = <1000>;
+};
+
 &qupv3_id_0 {
 	status = "okay";
 };