From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 13 Mar 2019 16:00:35 +0000 (+0800)
Subject: platform: plic: Fix plic_set_priority()
X-Git-Tag: v0.4~72
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ebe351e550cee8e2ffcc1883119e2f6e1e96dd82;p=platform%2Fkernel%2Fopensbi.git

platform: plic: Fix plic_set_priority()

At present plic_set_priority() ignores the 'source' and the priority
register to be programmed is constant. Fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 3a0c93f..7509f05 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -27,7 +27,10 @@ static volatile void *plic_base;
 
 static void plic_set_priority(u32 source, u32 val)
 {
-	writel(val, plic_base);
+	volatile void *plic_priority = plic_base +
+				PLIC_PRIORITY_BASE +
+				4 * source;
+	writel(val, plic_priority);
 }
 
 static void plic_set_thresh(u32 cntxid, u32 val)