From: Brian Paul <brianp@vmware.com>
Date: Thu, 22 Oct 2009 18:26:17 +0000 (-0600)
Subject: radeon: fix some renderbuffer format bugs
X-Git-Tag: mesa-7.8~2720^2~32
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=eb1b8ed1484f0cc792c5237114b54d5fa53164cc;p=platform%2Fupstream%2Fmesa.git

radeon: fix some renderbuffer format bugs
---

diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 21007d8..096ded2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -280,14 +280,14 @@ radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv)
             rrb->base._BaseFormat = GL_DEPTH_COMPONENT;
 	    break;
 	case GL_DEPTH_COMPONENT24:
-	    rrb->base.Format = MESA_FORMAT_Z32;
-	    rrb->base.DataType = GL_UNSIGNED_INT;
-            rrb->base._BaseFormat = GL_DEPTH_COMPONENT;
+	    rrb->base.Format = MESA_FORMAT_S8_Z24;
+	    rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
+            rrb->base._BaseFormat = GL_DEPTH_STENCIL;
 	    break;
 	case GL_DEPTH24_STENCIL8_EXT:
 	    rrb->base.Format = MESA_FORMAT_S8_Z24;
 	    rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
-            rrb->base._BaseFormat = GL_STENCIL_INDEX;
+            rrb->base._BaseFormat = GL_DEPTH_STENCIL;
 	    break;
 	default:
 	    fprintf(stderr, "%s: Unknown format 0x%04x\n", __FUNCTION__, format);
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 9cdcde1..2add8c3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -848,9 +848,9 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
 {
 	if (rrb->base.Format == MESA_FORMAT_RGB565) {
 		radeonInitPointers_RGB565(&rrb->base);
-	} else if (rrb->base.Format == MESA_FORMAT_RGBA8888) { /* XXX */
+	} else if (rrb->base.Format == MESA_FORMAT_XRGB8888) {
 		radeonInitPointers_xRGB8888(&rrb->base);
-	} else if (rrb->base.Format == MESA_FORMAT_RGBA8888) {
+	} else if (rrb->base.Format == MESA_FORMAT_ARGB8888) {
 		radeonInitPointers_ARGB8888(&rrb->base);
 	} else if (rrb->base.Format == MESA_FORMAT_ARGB4444) {
 		radeonInitPointers_ARGB4444(&rrb->base);
@@ -858,7 +858,7 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
 		radeonInitPointers_ARGB1555(&rrb->base);
 	} else if (rrb->base.Format == MESA_FORMAT_Z16) {
 		radeonInitDepthPointers_z16(&rrb->base);
-	} else if (rrb->base.Format == GL_DEPTH_COMPONENT32) { /* XXX */
+	} else if (rrb->base.Format == MESA_FORMAT_X8_Z24) {
 		radeonInitDepthPointers_z24(&rrb->base);
 	} else if (rrb->base.Format == MESA_FORMAT_S8_Z24) {
 		radeonInitDepthPointers_s8_z24(&rrb->base);