From: Jianxiong Pan Date: Fri, 23 Nov 2018 16:39:06 +0000 (+0800) Subject: Revert "arm: dts: tl1: add tl1 device tree fils [1/1]" X-Git-Tag: hardkernel-4.9.236-104~2187 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=eb0585ff905768b811d934a6d71c1f8df9b7cc8b;p=platform%2Fkernel%2Flinux-amlogic.git Revert "arm: dts: tl1: add tl1 device tree fils [1/1]" This reverts commit 32cfa235e3c9b543c396083068d107a800a93fdb. Change-Id: I23d0e860bd858e1a9982151977524b178524842a Signed-off-by: Jianxiong Pan --- diff --git a/MAINTAINERS b/MAINTAINERS index 2299d73..fbb21e7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14634,15 +14634,6 @@ F: drivers/amlogic/media/vout/backlight/bl_extern/bl_ext_default.c F: drivers/amlogic/media/vout/lcd/lcd_extern/i2c_ANX6862_7911.c F: include/linux/amlogic/media/vout/lcd/aml_lcd.h -AMLOGIC TL1 DTS -M: Bo Yang -F: arch/arm/boot/dts/amlogic/mesontl1.dtsi -F: arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi -F: arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi -F: arch/arm/boot/dts/amlogic/tl1_pxp.dts -F: arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts -F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts - AMLOGIC TL1 CLOCK DRIVERS M: Jian Hu F: include/dt-bindings/clock/amlogic,tl1-clkc.h diff --git a/arch/arm/boot/dts/amlogic/mesontl1.dtsi b/arch/arm/boot/dts/amlogic/mesontl1.dtsi index c128d88..7f35d8a 100644 --- a/arch/arm/boot/dts/amlogic/mesontl1.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontl1.dtsi @@ -41,14 +41,8 @@ reg = <0x0>; //timer=<&timer_a>; enable-method = "psci"; - clocks = <&clkc CLKID_CPU_CLK>, - <&clkc CLKID_CPU_FCLK_P>, - <&clkc CLKID_SYS_PLL>; - clock-names = "core_clk", - "low_freq_clk_parent", - "high_freq_clk_parent"; - operating-points-v2 = <&cpu_opp_table0>; - cpu-supply = <&vddcpu0>; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; //cpu-idle-states = <&SYSTEM_SLEEP_0>; }; @@ -58,14 +52,8 @@ reg = <0x1>; //timer=<&timer_b>; enable-method = "psci"; - clocks = <&clkc CLKID_CPU_CLK>, - <&clkc CLKID_CPU_FCLK_P>, - <&clkc CLKID_SYS_PLL>; - clock-names = "core_clk", - "low_freq_clk_parent", - "high_freq_clk_parent"; - operating-points-v2 = <&cpu_opp_table0>; - cpu-supply = <&vddcpu0>; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; //cpu-idle-states = <&SYSTEM_SLEEP_0>; }; @@ -75,14 +63,8 @@ reg = <0x2>; //timer=<&timer_c>; enable-method = "psci"; - clocks = <&clkc CLKID_CPU_CLK>, - <&clkc CLKID_CPU_FCLK_P>, - <&clkc CLKID_SYS_PLL>; - clock-names = "core_clk", - "low_freq_clk_parent", - "high_freq_clk_parent"; - operating-points-v2 = <&cpu_opp_table0>; - cpu-supply = <&vddcpu0>; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; //cpu-idle-states = <&SYSTEM_SLEEP_0>; }; @@ -92,14 +74,8 @@ reg = <0x0 0x3>; //timer=<&timer_d>; enable-method = "psci"; - clocks = <&clkc CLKID_CPU_CLK>, - <&clkc CLKID_CPU_FCLK_P>, - <&clkc CLKID_SYS_PLL>; - clock-names = "core_clk", - "low_freq_clk_parent", - "high_freq_clk_parent"; - operating-points-v2 = <&cpu_opp_table0>; - cpu-supply = <&vddcpu0>; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; //cpu-idle-states = <&SYSTEM_SLEEP_0>; }; }; @@ -125,23 +101,6 @@ bit_resolution =<0>; }; - arm_pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts = ; - reg = <0xff634400 0x1000>; - - /* addr = base + offset << 2 */ - sys_cpu_status0_offset = <0xa0>; - - sys_cpu_status0_pmuirq_mask = <0xf>; - - /* default 10ms */ - relax_timer_ns = <10000000>; - - /* default 10000us */ - max_wait_cnt = <10000>; - }; - gic: interrupt-controller@2c001000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; @@ -196,17 +155,6 @@ storage_version = <0x8200006C>; }; - mailbox: mhu@ff63c400 { - compatible = "amlogic, meson_mhu"; - reg = <0xff63c400 0x4c>, /* MHU registers */ - <0xfffd7000 0x800>; /* Payload area */ - interrupts = <0 209 1>, /* low priority interrupt */ - <0 210 1>; /* high priority interrupt */ - #mbox-cells = <1>; - mbox-names = "cpu_to_scp_low", "cpu_to_scp_high"; - mboxes = <&mailbox 0 &mailbox 1>; - }; - cpu_iomap { compatible = "amlogic, iomap"; #address-cells = <1>; @@ -262,26 +210,6 @@ status = "okay"; }; - securitykey { - compatible = "amlogic, securitykey"; - status = "okay"; - storage_query = <0x82000060>; - storage_read = <0x82000061>; - storage_write = <0x82000062>; - storage_tell = <0x82000063>; - storage_verify = <0x82000064>; - storage_status = <0x82000065>; - storage_list = <0x82000067>; - storage_remove = <0x82000068>; - storage_in_func = <0x82000023>; - storage_out_func = <0x82000024>; - storage_block_func = <0x82000025>; - storage_size_func = <0x82000027>; - storage_set_enctype = <0x8200006A>; - storage_get_enctype = <0x8200006B>; - storage_version = <0x8200006C>; - }; - vpu { compatible = "amlogic, vpu-tl1"; status = "okay"; @@ -300,20 +228,6 @@ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */ }; - ethmac: ethernet@ff3f0000 { - compatible = "amlogic, g12a-eth-dwmac","snps,dwmac"; - reg = <0xff3f0000 0x10000 - 0xff634540 0x8 - 0xff64c000 0xa0>; - reg-names = "eth_base", "eth_cfg", "eth_pll"; - interrupts = <0 8 1>; - interrupt-names = "macirq"; - status = "disabled"; - clocks = <&clkc CLKID_ETH_CORE>; - clock-names = "ethclk81"; - pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>; - analog_val = <0x20200000 0x0000c000 0x00000023>; - }; pinctrl_aobus: pinctrl@ff800014 { compatible = "amlogic,meson-tl1-aobus-pinctrl"; #address-cells = <1>; @@ -392,76 +306,6 @@ }; - dwc3: dwc3@ff500000 { - compatible = "synopsys, dwc3"; - status = "disabled"; - reg = <0xff500000 0x100000>; - interrupts = <0 30 4>; - usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>; - cpu-type = "gxl"; - clock-src = "usb3.0"; - clocks = <&clkc CLKID_USB_GENERAL>; - clock-names = "dwc_general"; - }; - - usb2_phy_v2: usb2phy@ffe09000 { - compatible = "amlogic, amlogic-new-usb2-v2"; - status = "disabled"; - reg = <0xffe09000 0x80 - 0xffd01008 0x100 - 0xff636000 0x2000 - 0xff63a000 0x2000 - 0xff658000 0x2000>; - pll-setting-1 = <0x09400414>; - pll-setting-2 = <0x927E0000>; - pll-setting-3 = <0xac5f69e5>; - pll-setting-4 = <0xfe18>; - pll-setting-5 = <0x8000fff>; - pll-setting-6 = <0x78000>; - pll-setting-7 = <0xe0004>; - pll-setting-8 = <0xe000c>; - version = <1>; - }; - - usb3_phy_v2: usb3phy@ffe09080 { - compatible = "amlogic, amlogic-new-usb3-v2"; - status = "disabled"; - reg = <0xffe09080 0x20>; - phy-reg = <0xff646000>; - phy-reg-size = <0x2000>; - usb2-phy-reg = <0xffe09000>; - usb2-phy-reg-size = <0x80>; - interrupts = <0 16 4>; - }; - - dwc2_a: dwc2_a@ff400000 { - compatible = "amlogic, dwc2"; - status = "disabled"; - device_name = "dwc2_a"; - reg = <0xff400000 0x40000>; - interrupts = <0 31 4>; - pl-periph-id = <0>; /** lm name */ - clock-src = "usb0"; /** clock src */ - port-id = <0>; /** ref to mach/usb.h */ - port-type = <2>; /** 0: otg, 1: host, 2: slave */ - port-speed = <0>; /** 0: default, high, 1: full */ - port-config = <0>; /** 0: default */ - /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/ - port-dma = <0>; - port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/ - usb-fifo = <728>; - cpu-type = "v2"; - phy-reg = <0xffe09000>; - phy-reg-size = <0xa0>; - /** phy-interface: 0x0: amlogic-v1 phy, 0x1: synopsys phy **/ - /** 0x2: amlogic-v2 phy **/ - phy-interface = <0x2>; - clocks = <&clkc CLKID_USB_GENERAL - &clkc CLKID_USB1_TO_DDR>; - clock-names = "usb_general", - "usb1"; - }; - wdt: watchdog@0xffd0f0d0 { compatible = "amlogic,meson-tl1-wdt"; status = "okay"; @@ -484,86 +328,6 @@ &gpio GPIOC_5 0>; }; - saradc:saradc { - compatible = "amlogic,meson-g12a-saradc"; - status = "disabled"; - #io-channel-cells = <1>; - clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>; - clock-names = "xtal", "saradc_clk"; - interrupts = ; - reg = <0xff809000 0x48>; - }; - - vddcpu0: pwmao_d-regulator { - compatible = "pwm-regulator"; - pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>; - regulator-name = "vddcpu0"; - regulator-min-microvolt = <721000>; - regulator-max-microvolt = <1021000>; - regulator-always-on; - max-duty-cycle = <1250>; - /* Voltage Duty-Cycle */ - voltage-table = <1021000 0>, - <1011000 3>, - <1001000 6>, - <991000 10>, - <981000 13>, - <971000 16>, - <961000 20>, - <951000 23>, - <941000 26>, - <931000 30>, - <921000 33>, - <911000 36>, - <901000 40>, - <891000 43>, - <881000 46>, - <871000 50>, - <861000 53>, - <851000 56>, - <841000 60>, - <831000 63>, - <821000 67>, - <811000 70>, - <801000 73>, - <791000 76>, - <781000 80>, - <771000 83>, - <761000 86>, - <751000 90>, - <741000 93>, - <731000 96>, - <721000 100>; - status = "okay"; - }; - - aml_dma { - compatible = "amlogic,aml_txlx_dma"; - reg = <0xff63e000 0x48>; - interrupts = <0 180 1>; - - aml_aes { - compatible = "amlogic,aes_g12a_dma"; - dev_name = "aml_aes_dma"; - status = "okay"; - }; - - aml_sha { - compatible = "amlogic,sha_dma"; - dev_name = "aml_sha_dma"; - status = "okay"; - }; - }; - - rng { - compatible = "amlogic,meson-rng"; - status = "okay"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0xff630218 0x4>; - quality = /bits/ 16 <1000>; - }; - soc { compatible = "simple-bus"; #address-cells = <1>; @@ -844,7 +608,7 @@ status = "okay"; clocks = <&xtal>; clock-names = "clk_uart"; - xtal_tick_en = <2>; + xtal_tick_en = <1>; fifosize = < 64 >; //pinctrl-names = "default"; //pinctrl-0 = <&ao_a_uart_pins>; @@ -852,18 +616,6 @@ support-sysrq = <0>; }; - uart_AO_B: serial@4000 { - compatible = "amlogic, meson-uart"; - reg = <0x4000 0x18>; - interrupts = <0 197 1>; - status = "disabled"; - clocks = <&xtal>; - clock-names = "clk_uart"; - fifosize = < 64 >; - pinctrl-names = "default"; - pinctrl-0 = <&ao_b_uart_pins1>; - }; - remote: rc@8040 { compatible = "amlogic, aml_remote"; reg = <0x8040 0x44>, @@ -877,14 +629,6 @@ max_frame_time = <200>; }; - meson_irblaster: irblaster@14c { - compatible = "amlogic, meson_irblaster"; - reg = <0x14c 0x10>, - <0x40 0x4>; - interrupts = <0 198 1>; - status = "disabled"; - }; - i2c_AO: i2c@5000 { compatible = "amlogic,meson-i2c"; status = "disabled"; @@ -900,7 +644,7 @@ i2c_AO_slave:i2c_slave@6000 { compatible = "amlogic, meson-i2c-slave"; status = "disabled"; - reg = <0x6000 0x20>; + reg = <0x0 0x6000 0x0 0x20>; interrupts = ; pinctrl-names="default"; pinctrl-0=<&i2c_ao_slave_pins>; @@ -1065,50 +809,8 @@ }; }; - uart_A: serial@ffd24000 { - compatible = "amlogic, meson-uart"; - reg = <0xffd24000 0x18>; - interrupts = <0 26 1>; - status = "disabled"; - clocks = <&xtal - &clkc CLKID_UART0>; - clock-names = "clk_uart", - "clk_gate"; - fifosize = < 128 >; - pinctrl-names = "default"; - pinctrl-0 = <&a_uart_pins>; - }; - - uart_B: serial@ffd23000 { - compatible = "amlogic, meson-uart"; - reg = <0xffd23000 0x18>; - interrupts = <0 75 1>; - status = "disabled"; - clocks = <&xtal - &clkc CLKID_UART1>; - clock-names = "clk_uart", - "clk_gate"; - fifosize = < 64 >; - pinctrl-names = "default"; - pinctrl-0 = <&b_uart_pins>; - }; - - uart_C: serial@ffd22000 { - compatible = "amlogic, meson-uart"; - reg = <0xffd22000 0x18>; - interrupts = <0 93 1>; - status = "disabled"; - clocks = <&xtal - &clkc CLKID_UART1>; - clock-names = "clk_uart", - "clk_gate"; - fifosize = < 64 >; - pinctrl-names = "default"; - pinctrl-0 = <&c_uart_pins>; - }; - sd_emmc_c: emmc@ffe07000 { - status = "disabled"; + status = "okay"; compatible = "amlogic, meson-mmc-tl1"; reg = <0xffe07000 0x800>; interrupts = <0 191 1>; @@ -1146,16 +848,32 @@ }; }; - sd_emmc_b: sdio@ffe05000 { - status = "disabled"; + sd_emmc_b: sd@ffe05000 { + status = "okay"; compatible = "amlogic, meson-mmc-tl1"; reg = <0xffe05000 0x800>; - interrupts = <0 190 4>; - - pinctrl-names = "sdio_all_pins", - "sdio_clk_cmd_pins"; - pinctrl-0 = <&sdio_all_pins>; - pinctrl-1 = <&sdio_clk_cmd_pins>; + interrupts = <0 190 1>; + + pinctrl-names = "sd_all_pins", + "sd_clk_cmd_pins", + "sd_1bit_pins", + "sd_clk_cmd_uart_pins", + "sd_1bit_uart_pins", + "sd_to_ao_uart_pins", + "ao_to_sd_uart_pins", + "sd_to_ao_jtag_pins", + "ao_to_sd_jtag_pins"; + pinctrl-0 = <&sd_all_pins>; + pinctrl-1 = <&sd_clk_cmd_pins>; + pinctrl-2 = <&sd_1bit_pins>; + pinctrl-3 = <&sd_to_ao_uart_clr_pins + &sd_clk_cmd_pins &ao_to_sd_uart_pins>; + pinctrl-4 = <&sd_to_ao_uart_clr_pins + &sd_1bit_pins &ao_to_sd_uart_pins>; + pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>; + pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>; + pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>; + pinctrl-8 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>; clocks = <&clkc CLKID_SD_EMMC_B>, <&clkc CLKID_SD_EMMC_B_P0_COMP>, @@ -1169,11 +887,14 @@ cap-mmc-highspeed; max-frequency = <100000000>; disable-wp; - sdio { - pinname = "sdio"; + sd { + pinname = "sd"; ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ max_req_size = <0x20000>; /**128KB*/ - card_type = <3>; + gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>; + jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>; + gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; + card_type = <5>; /* 3:sdio device(ie:sdio-wifi), * 4:SD combo (IO+mem) card */ @@ -1184,7 +905,7 @@ compatible = "amlogic,aml-spi-nor"; status = "disabled"; - reg = <0xffd14000 0x80>; + reg = <0x0 0xffd14000 0x0 0x80>; pinctrl-names = "default"; pinctrl-0 = <&spifc_all_pins>; clock-names = "core"; @@ -1200,8 +921,8 @@ slc_nand: nand-controller@0xFFE07800 { compatible = "amlogic, aml_mtd_nand"; - status = "disabled"; - reg = <0xFFE07800 0x200>; + status = "okay"; + reg = <0x0 0xFFE07800 0x0 0x200>; interrupts = <0 34 1>; pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only"; @@ -1351,71 +1072,10 @@ interrupt-names = "vsync"; }; - ionvideo { - compatible = "amlogic, ionvideo"; - status = "okay"; - }; - - amlvideo { - compatible = "amlogic, amlvideo"; - status = "okay"; - }; - vdac { compatible = "amlogic, vdac-tl1"; status = "okay"; }; - - dmc_monitor { - compatible = "amlogic, dmc_monitor"; - status = "okay"; - reg_base = <0xff638800>; - interrupts = ; - }; - audio_data: audio_data { - compatible = "amlogic, audio_data"; - query_licence_cmd = <0x82000050>; - status = "disabled"; - }; - - efuse: efuse{ - compatible = "amlogic, efuse"; - read_cmd = <0x82000030>; - write_cmd = <0x82000031>; - get_max_cmd = <0x82000033>; - key = <&efusekey>; - clocks = <&clkc CLKID_EFUSE>; - clock-names = "efuse_clk"; - status = "disabled"; - }; - - efusekey:efusekey{ - keynum = <4>; - key0 = <&key_0>; - key1 = <&key_1>; - key2 = <&key_2>; - key3 = <&key_3>; - key_0:key_0{ - keyname = "mac"; - offset = <0>; - size = <6>; - }; - key_1:key_1{ - keyname = "mac_bt"; - offset = <6>; - size = <6>; - }; - key_2:key_2{ - keyname = "mac_wifi"; - offset = <12>; - size = <6>; - }; - key_3:key_3{ - keyname = "usid"; - offset = <18>; - size = <16>; - }; - }; }; /* end of / */ &pinctrl_aobus { @@ -1539,67 +1199,25 @@ i2c_ao_2_pins:i2c_ao_2 { mux { - groups = "i2c_ao_sck_2", - "i2c_ao_sda_3"; - function = "i2c_ao"; - bias-pull-up; - drive-strength = <3>; + groups = "i2c_ao_sck_2", + "i2c_ao_sda_3"; + function = "i2c_ao"; }; }; i2c_ao_e_pins:i2c_ao_e { mux { - groups = "i2c_ao_sck_e", - "i2c_ao_sda_e"; - function = "i2c_ao"; - bias-pull-up; - drive-strength = <3>; + groups = "i2c_ao_sck_e", + "i2c_ao_sda_e"; + function = "i2c_ao"; }; }; i2c_ao_slave_pins:i2c_ao_slave { mux { - groups = "i2c_ao_slave_sck", - "i2c_ao_slave_sda"; - function = "i2c_ao_slave"; - }; - }; - - ao_uart_pins:ao_uart { - mux { - groups = "uart_ao_a_rx", - "uart_ao_a_tx"; - function = "uart_ao_a"; - }; - }; - - ao_b_uart_pins1:ao_b_uart1 { - mux { - groups = "uart_ao_b_tx_2", - "uart_ao_b_rx_3"; - function = "uart_ao_b"; - }; - }; - - ao_b_uart_pins2:ao_b_uart2 { - mux { - groups = "uart_ao_b_tx_8", - "uart_ao_b_rx_9"; - function = "uart_ao_b"; - }; - }; - - irblaster_pins:irblaster_pin { - mux { - groups = "remote_out_ao"; - function = "remote_out_ao"; - }; - }; - - irblaster_pins1:irblaster_pin1 { - mux { - groups = "remote_out_ao9"; - function = "remote_out_ao"; + groups = "i2c_ao_slave_sck", + "i2c_ao_slave_sda"; + function = "i2c_ao_slave"; }; }; }; @@ -1730,12 +1348,12 @@ }; }; - /* sdemmc port */ + /* sdemmc portA */ sdio_clk_cmd_pins: sdio_clk_cmd_pins { mux { - groups = "sdcard_clk", - "sdcard_cmd"; - function = "sdcard"; + groups = "sdio_clk", + "sdio_cmd"; + function = "sdio"; input-enable; bias-pull-up; drive-strength = <3>; @@ -1744,13 +1362,13 @@ sdio_all_pins: sdio_all_pins { mux { - groups = "sdcard_d0", - "sdcard_d1", - "sdcard_d2", - "sdcard_d3", - "sdcard_clk", - "sdcard_cmd"; - function = "sdcard"; + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", + "sdio_clk", + "sdio_cmd"; + function = "sdio"; input-enable; bias-pull-up; drive-strength = <3>; @@ -1885,8 +1503,6 @@ groups = "i2c0_sda_c", "i2c0_sck_c"; function = "i2c0"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1895,8 +1511,6 @@ groups = "i2c0_sda_dv", "i2c0_sck_dv"; function = "i2c0"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1905,8 +1519,6 @@ groups = "i2c1_sda_z", "i2c1_sck_z"; function = "i2c1"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1915,8 +1527,6 @@ groups = "i2c1_sda_h", "i2c1_sck_h"; function = "i2c1"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1925,8 +1535,6 @@ groups = "i2c2_sda_h", "i2c2_sck_h"; function = "i2c2"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1935,8 +1543,6 @@ groups = "i2c2_sda_z", "i2c2_sck_z"; function = "i2c2"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1945,8 +1551,6 @@ groups = "i2c3_sda_h1", "i2c3_sck_h0"; function = "i2c3"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1955,8 +1559,6 @@ groups = "i2c3_sda_h20", "i2c3_sck_h19"; function = "i2c3"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1965,8 +1567,6 @@ groups = "i2c3_sda_dv", "i2c3_sck_dv"; function = "i2c3"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1975,8 +1575,6 @@ groups = "i2c3_sda_c", "i2c3_sck_c"; function = "i2c3"; - bias-pull-up; - drive-strength = <3>; }; }; @@ -1999,105 +1597,4 @@ drive-strength = <1>; }; }; - - internal_eth_pins: internal_eth_pins { - mux { - groups = "eth_link_led", - "eth_act_led"; - function = "eth"; - }; - }; - - internal_gpio_pins: internal_gpio_pins { - mux { - groups = "GPIOZ_14", - "GPIOZ_15"; - function = "gpio_periphs"; - bias-disable; - input-enable; - }; - }; - - external_eth_pins: external_eth_pins { - mux { - groups = "eth_mdio", - "eth_mdc", - "eth_rgmii_rx_clk", - "eth_rx_dv", - "eth_rxd0", - "eth_rxd1", - "eth_rxd2_rgmii", - "eth_rxd3_rgmii", - "eth_rgmii_tx_clk", - "eth_txen", - "eth_txd0", - "eth_txd1", - "eth_txd2_rgmii", - "eth_txd3_rgmii"; - function = "eth"; - drive-strength = <3>; - }; - }; - - a_uart_pins:a_uart { - mux { - groups = "uart_a_tx", - "uart_a_rx", - "uart_a_cts", - "uart_a_rts"; - function = "uart_a"; - }; - }; - - b_uart_pins:b_uart { - mux { - groups = "uart_b_tx", - "uart_b_rx"; - function = "uart_b"; - }; - }; - - c_uart_pins:c_uart { - mux { - groups = "uart_c_tx", - "uart_c_rx"; - function = "uart_c"; - }; - }; - - lcd_vbyone_pins: lcd_vbyone_pin { - mux { - groups = "vx1_lockn","vx1_htpdn"; - function = "vx1"; - }; - }; - lcd_vbyone_off_pins: lcd_vbyone_off_pin { - mux { - groups = "GPIOH_15","GPIOH_16"; - function = "gpio_periphs"; - input-enable; - }; - }; - - lcd_tcon_pins: lcd_tcon_pin { - mux { - groups = "tcon_0","tcon_1","tcon_2","tcon_3", - "tcon_4","tcon_5","tcon_6","tcon_7", - "tcon_8","tcon_9","tcon_10","tcon_11", - "tcon_12","tcon_13","tcon_14","tcon_15", - "tcon_lock"; - function = "tcon"; - }; - }; - lcd_tcon_off_pins: lcd_tcon_off_pin { - mux { - groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3", - "GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7", - "GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11", - "GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15", - "GPIOH_16"; - function = "gpio_periphs"; - input-enable; - }; - }; }; diff --git a/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi deleted file mode 100644 index 32debc7..0000000 --- a/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi +++ /dev/null @@ -1,367 +0,0 @@ -/* - * arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi - * - * Copyright (C) 2016 Amlogic, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - */ - -/ { - lcd { - compatible = "amlogic, lcd-tl1"; - status = "okay"; - mode = "tv"; - fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ - key_valid = <0>; - clocks = <&clkc CLKID_VCLK2_ENCL - &clkc CLKID_VCLK2_VENCL - &clkc CLKID_TCON - &clkc CLKID_FCLK_DIV5 - &clkc CLKID_TCON_PLL_COMP>; - clock-names = "encl_top_gate", - "encl_int_gate", - "tcon_gate", - "fclk_div5", - "clk_tcon"; - reg = <0xff660000 0x8100 - 0xff634400 0x100>; - interrupts = <0 3 1 - 0 78 1 - 0 88 1>; - interrupt-names = "vsync","vbyone","tcon"; - pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off"; - pinctrl-0 = <&lcd_vbyone_pins>; - pinctrl-1 = <&lcd_vbyone_off_pins>; - pinctrl-2 = <&lcd_tcon_pins>; - pinctrl-3 = <&lcd_tcon_off_pins>; - pinctrl_version = <2>; /* for uboot */ - - /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ - /* power index:(gpios_index, or extern_index, 0xff=invalid) */ - /* power value:(0=output low, 1=output high, 2=input) */ - /* power delay:(unit in ms) */ - - lvds_0{ - model_name = "1080p-vfreq"; - interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 1920 1080 /*h_active, v_active*/ - 2200 1125 /*h_period, v_period*/ - 8 /*lcd_bits */ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 2060 2650 /*h_period_min,max*/ - 1100 1480 /*v_period_min,max*/ - 120000000 160000000>; /*pclk_min,max*/ - lcd_timing = < - 44 148 0 /*hs_width, hs_bp, hs_pol*/ - 5 30 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - lvds_attr = < - 1 /*lvds_repack*/ - 1 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 2 0 0 0 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0xff>; - }; - lvds_1{ - model_name = "1080p-hfreq_hdmi"; - interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 1920 1080 /*h_active, v_active*/ - 2200 1125 /*h_period, v_period*/ - 8 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 2080 2720 /*h_period min, max*/ - 1100 1380 /*v_period min, max*/ - 133940000 156000000>; /*pclk_min, max*/ - lcd_timing = < - 44 148 0 /*hs_width, hs_bp, hs_pol*/ - 5 30 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 4 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level */ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - lvds_attr = < - 1 /*lvds_repack*/ - 1 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 2 0 0 0 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0xff>; - }; - vbyone_0{ - model_name = "public_2region"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits */ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min, max*/ - 2200 2760 /*v_period_min, max*/ - 480000000 624000000>; /*pclk_min, max*/ - lcd_timing = < - 33 477 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 2 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable */ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0xff>; - }; - vbyone_1{ - model_name = "public_1region"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min, max*/ - 2200 2790 /*v_period_min, max*/ - 552000000 632000000>; /*pclk_min,max*/ - lcd_timing = < - 33 477 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 1 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable*/ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0xff>; - }; - p2p{ - model_name = "p2p_ceds"; - interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) - */ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 5000 2250 /*h_period, v_period*/ - 10 /*lcd_bits */ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 5100 /*h_period_min, max*/ - 2200 2760 /*v_period_min, max*/ - 480000000 624000000>; /*pclk_min, max*/ - lcd_timing = < - 16 29 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - p2p_attr = < - 1 /*lvds_repack*/ - 1 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/>; - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 3 2 0 200 /* extern init voltage */ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0xff>; - }; - }; - - lcd_extern{ - compatible = "amlogic, lcd_extern"; - status = "okay"; - key_valid = <0>; - i2c_bus = "i2c_bus_1"; - - extern_0{ - index = <0>; - extern_name = "ext_default"; - status = "disabled"; - type = <0>; /*0=i2c, 1=spi, 2=mipi*/ - i2c_address = <0x1c>; /*7bit i2c_addr*/ - i2c_address2 = <0xff>; - cmd_size = <0xff>; /*dynamic cmd_size*/ - - /* init on/off: - * fixed cmd_size: (type, value...); - * cmd_size include all data. - * dynamic cmd_size: (type, cmd_size, value...); - * cmd_size include value. - */ - /* type: 0x00=cmd with delay(bit[3:0]=1 for address2), - * 0xc0=cmd(bit[3:0]=1 for address2), - * 0xf0=gpio, - * 0xfd=delay, - * 0xff=ending - */ - /* value: i2c or spi cmd, or gpio index & level */ - /* delay: unit ms */ - init_on = < - 0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 - 0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73 - 0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00 - 0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 - 0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00 - 0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 - 0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 - 0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00 - 0xfd 1 10 /* delay 10ms */ - 0xff 0>; /*ending*/ - init_off = <0xff 0>; /*ending*/ - }; - extern_1{ - index = <1>; - extern_name = "i2c_T5800Q"; - status = "disabled"; - type = <0>; /* 0=i2c, 1=spi, 2=mipi */ - i2c_address = <0x1c>; /* 7bit i2c address */ - }; - extern_2{ - index = <2>; - extern_name = "i2c_ANX6862_7911"; - status = "okay"; - type = <0>; /* 0=i2c, 1=spi, 2=mipi */ - i2c_address = <0x20>; /* 7bit i2c address */ - i2c_address2 = <0x74>; /* 7bit i2c address */ - cmd_size = <0xff>; - - init_on = < - 0xc0 2 0x01 0x2b - 0xc0 2 0x02 0x05 - 0xc0 2 0x03 0x00 - 0xc0 2 0x04 0x00 - 0xc0 2 0x05 0x0c - 0xc0 2 0x06 0x04 - 0xc0 2 0x07 0x21 - 0xc0 2 0x08 0x0f - 0xc0 2 0x09 0x04 - 0xc0 2 0x0a 0x00 - 0xc0 2 0x0b 0x04 - 0xc0 2 0xff 0x00 - 0xfd 1 100 /* delay 100ms */ - - 0xc1 2 0x01 0xca - 0xc1 2 0x02 0x3b - 0xc1 2 0x03 0x33 - 0xc1 2 0x04 0x05 - 0xc1 2 0x05 0x2c - 0xc1 2 0x06 0xf2 - 0xc1 2 0x07 0x9c - 0xc1 2 0x08 0x1b - 0xc1 2 0x09 0x82 - 0xc1 2 0x0a 0x3d - 0xc1 2 0x0b 0x20 - 0xc1 2 0x0c 0x11 - 0xc1 2 0x0d 0xc4 - 0xc1 2 0x0e 0x1a - 0xc1 2 0x0f 0x31 - 0xc1 2 0x10 0x4c - 0xc1 2 0x11 0x12 - 0xc1 2 0x12 0x90 - 0xc1 2 0x13 0xf7 - 0xc1 2 0x14 0x0c - 0xc1 2 0x15 0x20 - 0xc1 2 0x16 0x13 - 0xff 0>; /*ending*/ - init_off = <0xff 0>; /*ending*/ - }; - }; - -}; /* end of / */ diff --git a/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi deleted file mode 100644 index 8640413..0000000 --- a/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi +++ /dev/null @@ -1,669 +0,0 @@ -/* - * arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi - * - * Copyright (C) 2016 Amlogic, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - */ - -/ { - lcd { - compatible = "amlogic, lcd-tl1"; - status = "okay"; - mode = "tv"; - fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ - key_valid = <0>; - clocks = <&clkc CLKID_VCLK2_ENCL - &clkc CLKID_VCLK2_VENCL - &clkc CLKID_TCON - &clkc CLKID_FCLK_DIV5 - &clkc CLKID_TCON_PLL_COMP>; - clock-names = "encl_top_gate", - "encl_int_gate", - "tcon_gate", - "fclk_div5", - "clk_tcon"; - reg = <0xff660000 0x8100 - 0xff634400 0x100>; - interrupts = <0 3 1 - 0 78 1 - 0 88 1>; - interrupt-names = "vsync","vbyone","tcon"; - pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off"; - pinctrl-0 = <&lcd_vbyone_pins>; - pinctrl-1 = <&lcd_vbyone_off_pins>; - pinctrl-2 = <&lcd_tcon_pins>; - pinctrl-3 = <&lcd_tcon_off_pins>; - pinctrl_version = <2>; /* for uboot */ - - /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ - /* power index:(gpios_index, or extern_index, 0xff=invalid) */ - /* power value:(0=output low, 1=output high, 2=input) */ - /* power delay:(unit in ms) */ - lcd_cpu-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH - &gpio GPIOH_2 GPIO_ACTIVE_HIGH - &gpio GPIOH_3 GPIO_ACTIVE_HIGH - &gpio GPIOH_12 GPIO_ACTIVE_HIGH - &gpio GPIOH_8 GPIO_ACTIVE_HIGH - &gpio GPIOH_10 GPIO_ACTIVE_HIGH - &gpio GPIOH_11 GPIO_ACTIVE_HIGH - &gpio GPIOH_14 GPIO_ACTIVE_HIGH>; - lcd_cpu_gpio_names = "GPIOAO_4","GPIOH_2","GPIOH_3","GPIOH_12", - "GPIOH_8","GPIOH_10","GPIOH_11","GPIOH_14"; - - lvds_0{ - model_name = "1080p-vfreq"; - interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 1920 1080 /*h_active, v_active*/ - 2200 1125 /*h_period, v_period*/ - 8 /*lcd_bits */ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 2060 2650 /*h_period_min,max*/ - 1100 1480 /*v_period_min,max*/ - 120000000 160000000>; /*pclk_min,max*/ - lcd_timing = < - 44 148 0 /*hs_width, hs_bp, hs_pol*/ - 5 30 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - lvds_attr = < - 1 /*lvds_repack*/ - 1 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 20 /*panel power on*/ - 2 0 0 0 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0>; - }; - - lvds_1{ - model_name = "1080p-hfreq_hdmi"; - interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 1920 1080 /*h_active, v_active*/ - 2200 1125 /*h_period, v_period*/ - 8 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 2080 2720 /*h_period min, max*/ - 1100 1380 /*v_period min, max*/ - 133940000 156000000>; /*pclk_min, max*/ - lcd_timing = < - 44 148 0 /*hs_width, hs_bp, hs_pol*/ - 5 30 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 4 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level */ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - lvds_attr = < - 1 /*lvds_repack*/ - 1 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 20 /*panel power on*/ - 2 0 0 0 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0>; - }; - lvds_2{ - model_name = "768p-vfreq"; - interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 1366 768 /*h_active, v_active*/ - 1560 806 /*h_period, v_period*/ - 8 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 1460 2000 /*h_period_min, max */ - 784 1015 /*v_period_min, max */ - 50000000 85000000>; /*pclk_min, max*/ - lcd_timing = < - 56 64 0 /*hs_width, hs_bp, hs_pol*/ - 3 28 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - lvds_attr = < - 1 /*lvds_repack*/ - 0 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 20 /*panel power on*/ - 2 0 0 0 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0>; - }; - vbyone_0{ - model_name = "public_2region"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits */ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min, max*/ - 2200 2760 /*v_period_min, max*/ - 480000000 624000000>; /*pclk_min, max*/ - lcd_timing = < - 33 477 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 2 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable */ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ - - /* power step: type, index, value, delay(ms) */ - power_on_step = <0 0 1 50 /*panel power on*/ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = <2 0 0 10 /*signal disable*/ - 0 0 0 200 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <2>; - }; - vbyone_1{ - model_name = "public_1region"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min, max*/ - 2200 2790 /*v_period_min, max*/ - 552000000 632000000>; /*pclk_min,max*/ - lcd_timing = < - 33 477 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 1 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable*/ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 50 /*panel power on*/ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 0 0 200 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <2>; - }; - vbyone_2{ - model_name = "public_2region_hdmi"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min, max*/ - 2200 2760 /*v_period_min, max*/ - 480000000 624000000>; /*v_period_min, max*/ - lcd_timing = < - 33 477 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 4 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 2 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable*/ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 50 /*panel power on*/ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 0 0 200 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <2>; - }; - vbyone_3{ - model_name = "BOE_HV550QU2"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min, max*/ - 2200 2760 /*v_period_min, max*/ - 560000000 624000000>; /*pclk_min, max*/ - lcd_timing = < - 33 477 1 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 2 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable*/ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 20 /*panel power on*/ - 0 3 0 10 /*3d_disable*/ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 3 2 0 /*3d_disable*/ - 0 0 0 100 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <2>; - }; - vbyone_4{ - model_name = "BOE_HV550QU2_1region"; - interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 4400 2250 /*h_period, v_period*/ - 10 /*lcd_bits*/ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 4800 /*h_period_min,max*/ - 2200 2760 /*v_period_min,max*/ - 560000000 624000000>; /*pclk_min, max*/ - lcd_timing = < - 33 477 1 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 1 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - vbyone_attr = < - 8 /*lane_count*/ - 1 /*region_num*/ - 4 /*byte_mode*/ - 4>; /*color_fmt*/ - vbyone_intr_enable = < - 1 /*vbyone_intr_enable*/ - 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 20 /*panel power on*/ - 0 3 0 10 /*3d_disable*/ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 3 2 0 /*3d_disable*/ - 0 0 0 100 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <2>; - }; - p2p{ - model_name = "p2p_ceds"; - interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) - */ - basic_setting = < - 3840 2160 /*h_active, v_active*/ - 5000 2250 /*h_period, v_period*/ - 10 /*lcd_bits */ - 16 9>; /*screen_widht, screen_height*/ - range_setting = < - 4240 5100 /*h_period_min, max*/ - 2200 2760 /*v_period_min, max*/ - 480000000 624000000>; /*pclk_min, max*/ - lcd_timing = < - 16 29 0 /*hs_width, hs_bp, hs_pol*/ - 6 65 0>; /*vs_width, vs_bp, vs_pol*/ - clk_attr = < - 2 /*fr_adj_type - *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, - * 4=hdmi_mode) - */ - 0 /*clk_ss_level*/ - 1 /*clk_auto_generate*/ - 0>; /*pixel_clk(unit in Hz)*/ - p2p_attr = < - 1 /*lvds_repack*/ - 1 /*dual_port*/ - 0 /*pn_swap*/ - 0 /*port_swap*/ - 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/>; - - /* power step: type, index, value, delay(ms) */ - power_on_step = < - 0 0 1 20 /*panel power on*/ - 3 2 0 200 /* extern init voltage */ - 2 0 0 10 /*signal enable*/ - 0xff 0 0 0>; /*ending*/ - power_off_step = < - 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ - 0xff 0 0 0>; /*ending*/ - backlight_index = <0xff>; - }; - }; - - lcd_extern{ - compatible = "amlogic, lcd_extern"; - status = "okay"; - key_valid = <0>; - i2c_bus = "i2c_bus_1"; - - extern_0{ - index = <0>; - extern_name = "ext_default"; - status = "disabled"; - type = <0>; /*0=i2c, 1=spi, 2=mipi*/ - i2c_address = <0x1c>; /*7bit i2c_addr*/ - i2c_address2 = <0xff>; - cmd_size = <0xff>; /*dynamic cmd_size*/ - - /* init on/off: - * fixed cmd_size: (type, value...); - * cmd_size include all data. - * dynamic cmd_size: (type, cmd_size, value...); - * cmd_size include value. - */ - /* type: 0x00=cmd with delay(bit[3:0]=1 for address2), - * 0xc0=cmd(bit[3:0]=1 for address2), - * 0xf0=gpio, - * 0xfd=delay, - * 0xff=ending - */ - /* value: i2c or spi cmd, or gpio index & level */ - /* delay: unit ms */ - init_on = < - 0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 - 0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73 - 0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00 - 0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 - 0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00 - 0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 - 0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 - 0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00 - 0xfd 1 10 /* delay 10ms */ - 0xff 0>; /*ending*/ - init_off = <0xff 0>; /*ending*/ - }; - extern_1{ - index = <1>; - extern_name = "i2c_T5800Q"; - status = "disabled"; - type = <0>; /* 0=i2c, 1=spi, 2=mipi */ - i2c_address = <0x1c>; /* 7bit i2c address */ - }; - extern_2{ - index = <2>; - extern_name = "i2c_ANX6862_7911"; - status = "okay"; - type = <0>; /* 0=i2c, 1=spi, 2=mipi */ - i2c_address = <0x20>; /* 7bit i2c address */ - i2c_address2 = <0x74>; /* 7bit i2c address */ - cmd_size = <0xff>; - - init_on = < - 0xc0 2 0x01 0x2b - 0xc0 2 0x02 0x05 - 0xc0 2 0x03 0x00 - 0xc0 2 0x04 0x00 - 0xc0 2 0x05 0x0c - 0xc0 2 0x06 0x04 - 0xc0 2 0x07 0x21 - 0xc0 2 0x08 0x0f - 0xc0 2 0x09 0x04 - 0xc0 2 0x0a 0x00 - 0xc0 2 0x0b 0x04 - 0xc0 2 0xff 0x00 - 0xfd 1 100 /* delay 100ms */ - - 0xc1 2 0x01 0xca - 0xc1 2 0x02 0x3b - 0xc1 2 0x03 0x33 - 0xc1 2 0x04 0x05 - 0xc1 2 0x05 0x2c - 0xc1 2 0x06 0xf2 - 0xc1 2 0x07 0x9c - 0xc1 2 0x08 0x1b - 0xc1 2 0x09 0x82 - 0xc1 2 0x0a 0x3d - 0xc1 2 0x0b 0x20 - 0xc1 2 0x0c 0x11 - 0xc1 2 0x0d 0xc4 - 0xc1 2 0x0e 0x1a - 0xc1 2 0x0f 0x31 - 0xc1 2 0x10 0x4c - 0xc1 2 0x11 0x12 - 0xc1 2 0x12 0x90 - 0xc1 2 0x13 0xf7 - 0xc1 2 0x14 0x0c - 0xc1 2 0x15 0x20 - 0xc1 2 0x16 0x13 - 0xff 0>; /*ending*/ - init_off = <0xff 0>; /*ending*/ - }; - }; - - backlight{ - compatible = "amlogic, backlight-tl1"; - status = "okay"; - key_valid = <0>; - pinctrl-names = "pwm_on","pwm_vs_on", - "pwm_combo_0_1_on", - "pwm_combo_0_vs_1_on", - "pwm_combo_0_1_vs_on", - "pwm_off", - "pwm_combo_off"; - pinctrl-0 = <&pwm_c_pins3>; - pinctrl-1 = <&bl_pwm_vs_on_pins>; - pinctrl-2 = <&pwm_c_pins3 &pwm_d_pins2>; - pinctrl-3 = <&bl_pwm_combo_0_vs_on_pins &pwm_d_pins2>; - pinctrl-4 = <&pwm_c_pins3 &bl_pwm_combo_1_vs_on_pins>; - pinctrl-5 = <&bl_pwm_off_pins>; - pinctrl-6 = <&bl_pwm_combo_off_pins>; - pinctrl_version = <2>; /* for uboot */ - interrupts = <0 3 1>; - interrupt-names = "ldim_vsync"; - bl_pwm_config = <&bl_pwm_conf>; - - /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/ - /* power index:(point gpios_index, 0xff=invalid) */ - /* power value:(0=output low, 1=output high, 2=input) */ - /* power delay:(unit in ms) */ - bl-gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH - &gpio GPIOZ_5 GPIO_ACTIVE_HIGH - &gpio GPIOZ_6 GPIO_ACTIVE_HIGH>; - bl_gpio_names = "GPIOAO_11","GPIOZ_5","GPIOZ_6"; - - backlight_0{ - index = <0>; - bl_name = "backlight_pwm"; - bl_level_default_uboot_kernel = <100 100>; - bl_level_attr = <255 10 /*max, min*/ - 128 128>; /*mid, mid_mapping*/ - bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/ - bl_power_attr = <0 /*en_gpio_index*/ - 1 0 /*on_value, off_value*/ - 200 200>; /*on_delay(ms), off_delay(ms)*/ - bl_pwm_port = "PWM_C"; - bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ - 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ - 100 25>; /*duty_max(%), duty_min(%)*/ - bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ - 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ - bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ - }; - backlight_1{ - index = <1>; - bl_name = "backlight_pwm_vs"; - bl_level_default_uboot_kernel = <100 100>; - bl_level_attr = <255 10 /*max, min*/ - 128 128>; /*mid, mid_mapping*/ - bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/ - bl_power_attr = <0 /*en_gpio_index*/ - 1 0 /*on_value, off_value*/ - 200 200>; /* on_delay(ms), off_delay(ms)*/ - bl_pwm_port = "PWM_VS"; - bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ - 2 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ - 100 25>; /*duty_max(%), duty_min(%)*/ - bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ - 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ - bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ - }; - backlight_2{ - index = <2>; - bl_name = "backlight_pwm_combo"; - bl_level_default_uboot_kernel = <31 100>; - bl_level_attr = <255 10 /*max, min*/ - 128 128>; /*mid, mid_mapping*/ - bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/ - bl_power_attr = <0 /*en_gpio_index*/ - 1 0 /*on_value, off_value*/ - 410 110>; /*on_delay(ms), off_delay(ms)*/ - bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/ - 0 0>; /*pwm_1 range*/ - bl_pwm_combo_port = "PWM_B","PWM_C"; - bl_pwm_combo_attr = <1 /*pwm0 method*/ - 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ - 100 25 /*pwm0 duty_max(%), duty_min(%)*/ - 1 /*pwm1 method*/ - 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ - 80 80>; /*pwm1 duty_max(%), duty_min(%)*/ - bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ - 2 0 /*pwm1 gpio_index, gpio_off*/ - 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ - }; - }; - - bl_pwm_conf:bl_pwm_conf{ - pwm_channel_0 { - pwm_port_index = <2>; - pwms = <&pwm_cd MESON_PWM_0 30040 0>; - }; - pwm_channel_1 { - pwm_port_index = <3>; - pwms = <&pwm_cd MESON_PWM_1 30040 0>; - }; - }; - -}; /* end of / */ diff --git a/arch/arm/boot/dts/amlogic/tl1_pxp.dts b/arch/arm/boot/dts/amlogic/tl1_pxp.dts index c26c68d..2df2461 100644 --- a/arch/arm/boot/dts/amlogic/tl1_pxp.dts +++ b/arch/arm/boot/dts/amlogic/tl1_pxp.dts @@ -16,10 +16,7 @@ */ /dts-v1/; - #include "mesontl1.dtsi" -#include "partition_mbox_normal_P_32.dtsi" -#include "mesontl1_skt-panel.dtsi" / { model = "Amlogic TL1 PXP"; @@ -37,7 +34,7 @@ memory@00000000 { device_type = "memory"; - linux,usable-memory = <0x100000 0x7ff00000>; + linux,usable-memory = <0x000000 0x80000000>; }; reserved-memory { @@ -60,7 +57,7 @@ size = <0x13400000>; alignment = <0x400000>; linux,contiguous-region; - alloc-ranges = <0x12000000 0x13400000>; + alloc-ranges = <0x30000000 0x50000000>; }; /* codec shared reserved */ @@ -104,37 +101,15 @@ alignment = <0x400000>; }; - /*di CMA pool */ - di_cma_reserved:linux,di_cma { - compatible = "shared-dma-pool"; - reusable; - /* buffer_size = 3621952(yuv422 8bit) - * | 4736064(yuv422 10bit) - * | 4074560(yuv422 10bit full pack mode) - * 10x3621952=34.6M(0x23) support 8bit - * 10x4736064=45.2M(0x2e) support 12bit - * 10x4074560=40M(0x28) support 10bit - */ - size = <0x02800000>; - alignment = <0x400000>; - }; - /* for hdmi rx emp use */ hdmirx_emp_cma_reserved:linux,emp_cma { compatible = "shared-dma-pool"; /*linux,phandle = <5>;*/ reusable; - /* 4M for emp to ddr */ - /* 32M for tmds to ddr */ - size = <0x2000000>; - alignment = <0x400000>; - /* alloc-ranges = <0x400000 0x2000000>; */ - }; - - /* POST PROCESS MANAGER */ - ppmgr_reserved:linux,ppmgr { - compatible = "amlogic, ppmgr_memory"; - size = <0x0>; + /* 2M-30M for emp or tmds to ddr */ + size = <0x01e00000>; + alignment = <0x10000>; + alloc-ranges = <0x30000000 0x50000000>; }; }; /* end of reserved-memory */ @@ -144,37 +119,6 @@ memory-region = <&codec_mm_cma &codec_mm_reserved>; }; - ppmgr { - compatible = "amlogic, ppmgr"; - memory-region = <&ppmgr_reserved>; - status = "okay"; - }; - - deinterlace { - compatible = "amlogic, deinterlace"; - status = "okay"; - /* 0:use reserved; 1:use cma; 2:use cma as reserved */ - flag_cma = <1>; - //memory-region = <&di_reserved>; - memory-region = <&di_cma_reserved>; - interrupts = <0 46 1 - 0 40 1>; - interrupt-names = "pre_irq", "post_irq"; - clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, - <&clkc CLKID_VPU_CLKB_COMP>; - clock-names = "vpu_clkb_tmp_composite", - "vpu_clkb_composite"; - clock-range = <334 667>; - /* buffer-size = <3621952>;(yuv422 8bit) */ - buffer-size = <4074560>;/*yuv422 fullpack*/ - /* reserve-iomap = "true"; */ - /* if enable nr10bit, set nr10bit-support to 1 */ - post-wr-support = <1>; - nr10bit-support = <1>; - nrds-enable = <1>; - pps-enable = <1>; - }; - vout { compatible = "amlogic, vout"; status = "okay"; @@ -202,31 +146,6 @@ tdmout_index = <1>; }; - aml_dtv_demod { - compatible = "amlogic, ddemod-tl1"; - dev_name = "aml_dtv_demod"; - status = "okay"; - - //pinctrl-names="dtvdemod_agc"; - //pinctrl-0=<&dtvdemod_agc>; - - clocks = <&clkc CLKID_DAC_CLK>; - clock-names = "vdac_clk_gate"; - - reg = <0xff650000 0x4000 /*dtv demod base*/ - 0xff63c000 0x2000 /*hiu reg base*/ - 0xff800000 0x1000 /*io_aobus_base*/ - 0xffd01000 0x1000 /*reset*/ - >; - - /*move from dvbfe*/ - dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? - spectrum = <1>; - cma_flag = <1>; - cma_mem_size = <8>; - //memory-region = <&demod_cma_reserved>;//<&demod_reserved>; - }; - auge_sound { compatible = "amlogic, tl1-sound-card"; aml-audio-card,name = "AML-AUGESOUND"; @@ -340,7 +259,7 @@ /* suffix-name, sync with android audio hal used for */ suffix-name = "alsaPORT-spdif"; cpu { - sound-dai = <&spdifa>; + sound-dai = <&spdif_a>; system-clock-frequency = <6144000>; }; codec { @@ -351,7 +270,7 @@ aml-audio-card,dai-link@5 { mclk-fs = <128>; cpu { - sound-dai = <&spdifb>; + sound-dai = <&spdif_b>; system-clock-frequency = <6144000>; }; codec { @@ -381,28 +300,6 @@ <0 13 1>; }; - amlvecm { - compatible = "amlogic, vecm"; - dev_name = "aml_vecm"; - status = "okay"; - gamma_en = <1>;/*1:enabel ;0:disable*/ - wb_en = <1>;/*1:enabel ;0:disable*/ - cm_en = <1>;/*1:enabel ;0:disable*/ - wb_sel = <1>;/*1:mtx ;0:gainoff*/ - vlock_en = <1>;/*1:enable;0:disable*/ - vlock_mode = <0x4>; - /* vlock work mode: - *bit0:auto ENC - *bit1:auto PLL - *bit2:manual PLL - *bit3:manual ENC - *bit4:manual soft ENC - *bit5:manual MIX PLL ENC - */ - vlock_pll_m_limit = <1>; - vlock_line_limit = <3>; - }; - vdin@0 { compatible = "amlogic, vdin"; /*memory-region = <&vdin0_cma_reserved>;*/ @@ -476,12 +373,11 @@ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux &hdmirx_c_mux>; repeat = <0>; - interrupts = <0 41 1>; + interrupts = <0 56 1>; clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, <&clkc CLKID_HDMIRX_CFG_COMP>, <&clkc CLKID_HDMIRX_ACR_COMP>, - <&clkc CLKID_HDMIRX_METER_COMP>, - <&clkc CLKID_HDMIRX_AXI_COMP>, + <&clkc CLKID_HDMIRX_AUDMEAS_COMP>, <&xtal>, <&clkc CLKID_FCLK_DIV5>, <&clkc CLKID_FCLK_DIV7>, @@ -493,8 +389,7 @@ clock-names = "hdmirx_modet_clk", "hdmirx_cfg_clk", "hdmirx_acr_ref_clk", - "cts_hdmirx_meter_clk", - "cts_hdmi_axi_clk", + "hdmirx_audmeas_clk", "xtal", "fclk_div5", "fclk_div7", @@ -550,106 +445,10 @@ reg-names = "ao_exit","ao"; }; - /*DCDC for MP8756GD*/ - cpu_opp_table0: cpu_opp_table0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <731000>; - }; - opp01 { - opp-hz = /bits/ 64 <250000000>; - opp-microvolt = <731000>; - }; - opp02 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <731000>; - }; - opp03 { - opp-hz = /bits/ 64 <667000000>; - opp-microvolt = <761000>; - }; - opp04 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <781000>; - }; - opp05 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <801000>; - }; - opp06 { - opp-hz = /bits/ 64 <1398000000>; - opp-microvolt = <831000>; - }; - opp07 { - opp-hz = /bits/ 64 <1512000000>; - opp-microvolt = <861000>; - }; - opp08 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <891000>; - }; - opp09 { - opp-hz = /bits/ 64 <1704000000>; - opp-microvolt = <921000>; - }; - opp10 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <981000>; - }; - opp11 { - opp-hz = /bits/ 64 <1908000000>; - opp-microvolt = <1011000>; - }; - }; - - cpufreq-meson { - compatible = "amlogic, cpufreq-meson"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm_ao_d_pins3>; - status = "okay"; - }; - - tuner: tuner { - status = "okay"; - tuner_name = "mxl661_tuner"; - tuner_i2c_adap = <&i2c0>; - tuner_i2c_addr = <0x60>; - tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */ - tuner_xtal_mode = <3>; - /* NO_SHARE_XTAL(0) - * SLAVE_XTAL_SHARE(3) - */ - tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */ - }; - - atv-demod { - compatible = "amlogic, atv-demod"; - status = "okay"; - tuner = <&tuner>; - btsc_sap_mode = <1>; - /* pinctrl-names="atvdemod_agc_pins"; */ - /* pinctrl-0=<&atvdemod_agc_pins>; */ - reg = <0xff656000 0x2000 /* demod reg */ - 0xff63c000 0x2000 /* hiu reg */ - 0xff634000 0x2000 /* periphs reg */ - 0xff64a000 0x2000>; /* audio reg */ - reg_23cf = <0x88188832>; - /*default:0x88188832;r840 on haier:0x48188832*/ - }; }; /* end of / */ -&i2c0 { - status = "okay"; - clock-frequency = <300000>; - pinctrl-names="default"; - pinctrl-0=<&i2c0_dv_pins>; -}; - &audiobus { - tdma:tdm@0 { + tdma:tdm { compatible = "amlogic, tl1-snd-tdma"; #sound-dai-cells = <0>; @@ -667,7 +466,7 @@ status = "okay"; }; - tdmb:tdm@1 { + tdmb:tdm { compatible = "amlogic, tl1-snd-tdmb"; #sound-dai-cells = <0>; @@ -682,7 +481,7 @@ status = "okay"; }; - tdmc:tdm@2 { + tdmc:tdm { compatible = "amlogic, tl1-snd-tdmc"; #sound-dai-cells = <0>; @@ -700,16 +499,16 @@ status = "okay"; }; - spdifa:spdif@0 { + spdif_a:spdif { compatible = "amlogic, tl1-snd-spdif-a"; #sound-dai-cells = <0>; clocks = <&clkc CLKID_MPLL0 &clkc CLKID_FCLK_DIV4 - &clkaudio CLKID_AUDIO_GATE_SPDIFIN - &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A &clkaudio CLKID_AUDIO_SPDIFIN - &clkaudio CLKID_AUDIO_SPDIFOUT_A>; + &clkaudio CLKID_AUDIO_SPDIFOUT + &clkaudio CLKID_AUDIO_SPDIFIN_CTRL + &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>; clock-names = "sysclk", "fixed_clk", "gate_spdifin", "gate_spdifout", "clk_spdifin", "clk_spdifout"; @@ -720,31 +519,16 @@ pinctrl-names = "spdif_pins"; pinctrl-0 = <&spdifout_a &spdifin_a>; - /* - * whether do asrc for pcm and resample a or b - * if raw data, asrc is disabled automatically - * 0: "Disable", - * 1: "Enable:32K", - * 2: "Enable:44K", - * 3: "Enable:48K", - * 4: "Enable:88K", - * 5: "Enable:96K", - * 6: "Enable:176K", - * 7: "Enable:192K", - */ - asrc_id = <0>; - auto_asrc = <0>; - status = "okay"; }; - spdifb:spdif@1 { + spdif_b:spdif { compatible = "amlogic, tl1-snd-spdif-b"; #sound-dai-cells = <0>; clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ - &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B - &clkaudio CLKID_AUDIO_SPDIFOUT_B>; + &clkaudio CLKID_AUDIO_SPDIFOUTB + &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>; clock-names = "sysclk", "gate_spdifout", "clk_spdifout"; @@ -755,7 +539,7 @@ compatible = "amlogic, tl1-snd-pdm"; #sound-dai-cells = <0>; - clocks = <&clkaudio CLKID_AUDIO_GATE_PDM + clocks = <&clkaudio CLKID_AUDIO_PDM &clkc CLKID_FCLK_DIV3 &clkc CLKID_MPLL3 &clkaudio CLKID_AUDIO_PDMIN0 @@ -786,78 +570,6 @@ status = "okay"; }; - aed:effect { - compatible = "amlogic, snd-effect-v2"; - #sound-dai-cells = <0>; - - clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC - &clkc CLKID_FCLK_DIV5 - &clkaudio CLKID_AUDIO_EQDRC>; - clock-names = "gate", "clk_srcpll", "eqdrc"; - - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; - /* - * 0:tdmout_a - * 1:tdmout_b - * 2:tdmout_c - * 3:spdifout - * 4:spdifout_b - */ - eqdrc_module = <1>; - /* max 0xf, each bit for one lane, usually one lane */ - lane_mask = <0x1>; - /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; - - status = "disabled"; - }; - - asrca: resample@0 { - compatible = "amlogic, tl1-resample-a"; - clocks = <&clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_MCLK_F - &clkaudio CLKID_AUDIO_RESAMPLE_A>; - clock-names = "resample_pll", "resample_src", "resample_clk"; - /*same with toddr_src - * TDMIN_A, 0 - * TDMIN_B, 1 - * TDMIN_C, 2 - * SPDIFIN, 3 - * PDMIN, 4 - * NONE, - * TDMIN_LB, 6 - * LOOPBACK, 7 - */ - resample_module = <3>; - - status = "disabled"; - }; - - asrcb: resample@1 { - compatible = "amlogic, tl1-resample-b"; - - clocks = <&clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_MCLK_F - &clkaudio CLKID_AUDIO_RESAMPLE_B>; - clock-names = "resample_pll", "resample_src", "resample_clk"; - - /*same with toddr_src - * TDMIN_A, 0 - * TDMIN_B, 1 - * TDMIN_C, 2 - * SPDIFIN, 3 - * PDMIN, 4 - * NONE, - * TDMIN_LB, 6 - * LOOPBACK, 7 - */ - resample_module = <3>; - - status = "disabled"; - }; - }; /* end of audiobus */ &pinctrl_periphs { @@ -1024,27 +736,6 @@ }; }; -&dwc3 { - status = "okay"; -}; - -&usb2_phy_v2 { - status = "okay"; - portnum = <3>; -}; - -&usb3_phy_v2 { - status = "okay"; - portnum = <0>; - otg = <0>; -}; - -&dwc2_a { - status = "okay"; - /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ - controller-type = <1>; -}; - &spicc0 { status = "okay"; pinctrl-names = "default"; @@ -1060,11 +751,3 @@ mem_alloc = <1>; pxp_mode = <1>; /** 0:normal mode 1:pxp mode */ }; - -&pwm_AO_cd { - status = "okay"; -}; - -&efuse { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts b/arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts deleted file mode 100644 index b56a05f..0000000 --- a/arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts +++ /dev/null @@ -1,1555 +0,0 @@ -/* - * arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts - * - * Copyright (C) 2018 Amlogic, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - */ - -/dts-v1/; - -#include "mesontl1.dtsi" -#include "partition_mbox_normal_P_32.dtsi" -#include "mesontl1_skt-panel.dtsi" - -/ { - model = "Amlogic TL1 T962X2 SKT"; - amlogic-dt-id = "tl1_t962x2_skt"; - compatible = "amlogic, tl1_t962x2_skt"; - - aliases { - serial0 = &uart_AO; - serial1 = &uart_A; - serial2 = &uart_B; - serial3 = &uart_C; - serial4 = &uart_AO_B; - tsensor0 = &p_tsensor; - tsensor1 = &d_tsensor; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c_AO; - }; - - memory@00000000 { - device_type = "memory"; - linux,usable-memory = <0x100000 0x7ff00000>; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - /* global autoconfigured region for contiguous allocations */ - secmon_reserved: linux,secmon { - compatible = "shared-dma-pool"; - reusable; - size = <0x400000>; - alignment = <0x400000>; - alloc-ranges = <0x05000000 0x400000>; - }; - - codec_mm_cma:linux,codec_mm_cma { - compatible = "shared-dma-pool"; - reusable; - /* ion_codec_mm max can alloc size 80M*/ - size = <0x13400000>; - alignment = <0x400000>; - linux,contiguous-region; - alloc-ranges = <0x12000000 0x13400000>; - }; - - /* codec shared reserved */ - codec_mm_reserved:linux,codec_mm_reserved { - compatible = "amlogic, codec-mm-reserved"; - size = <0x0>; - alignment = <0x100000>; - //no-map; - }; - - logo_reserved:linux,meson-fb { - compatible = "shared-dma-pool"; - reusable; - size = <0x800000>; - alignment = <0x400000>; - alloc-ranges = <0x7f800000 0x800000>; - }; - - ion_cma_reserved:linux,ion-dev { - compatible = "shared-dma-pool"; - reusable; - size = <0x8000000>; - alignment = <0x400000>; - }; - - /* vdin0 CMA pool */ - //vdin0_cma_reserved:linux,vdin0_cma { - // compatible = "shared-dma-pool"; - // reusable; - /* 3840x2160x4x4 ~=128 M */ - // size = <0xc400000>; - // alignment = <0x400000>; - //}; - - /* vdin1 CMA pool */ - vdin1_cma_reserved:linux,vdin1_cma { - compatible = "shared-dma-pool"; - reusable; - /* 1920x1080x2x4 =16 M */ - size = <0x1400000>; - alignment = <0x400000>; - }; - - /*di CMA pool */ - di_cma_reserved:linux,di_cma { - compatible = "shared-dma-pool"; - reusable; - /* buffer_size = 3621952(yuv422 8bit) - * | 4736064(yuv422 10bit) - * | 4074560(yuv422 10bit full pack mode) - * 10x3621952=34.6M(0x23) support 8bit - * 10x4736064=45.2M(0x2e) support 12bit - * 10x4074560=40M(0x28) support 10bit - */ - size = <0x02800000>; - alignment = <0x400000>; - }; - - demod_reserved:linux,demod { - compatible = "amlogic, demod-mem"; - size = <0x800000>; //8M //100m 0x6400000 - alloc-ranges = <0x0 0x30000000>; - //multi-use; - //no-map; - }; - - /*vbi reserved mem*/ - vbi_reserved:linux,vbi { - compatible = "amlogic, vbi-mem"; - size = <0x100000>; - alloc-ranges = <0x0e000000 0x800000>; - }; - - /* for hdmi rx emp use */ - hdmirx_emp_cma_reserved:linux,emp_cma { - compatible = "shared-dma-pool"; - /*linux,phandle = <5>;*/ - reusable; - /* 4M for emp to ddr */ - /* 32M for tmds to ddr */ - size = <0x2000000>; - alignment = <0x400000>; - /* alloc-ranges = <0x400000 0x2000000>; */ - }; - - /* POST PROCESS MANAGER */ - ppmgr_reserved:linux,ppmgr { - compatible = "amlogic, ppmgr_memory"; - size = <0x0>; - }; - }; /* end of reserved-memory */ - - codec_mm { - compatible = "amlogic, codec, mm"; - status = "okay"; - memory-region = <&codec_mm_cma &codec_mm_reserved>; - }; - - ppmgr { - compatible = "amlogic, ppmgr"; - memory-region = <&ppmgr_reserved>; - status = "okay"; - }; - - deinterlace { - compatible = "amlogic, deinterlace"; - status = "okay"; - /* 0:use reserved; 1:use cma; 2:use cma as reserved */ - flag_cma = <1>; - //memory-region = <&di_reserved>; - memory-region = <&di_cma_reserved>; - interrupts = <0 46 1 - 0 40 1>; - interrupt-names = "pre_irq", "post_irq"; - clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, - <&clkc CLKID_VPU_CLKB_COMP>; - clock-names = "vpu_clkb_tmp_composite", - "vpu_clkb_composite"; - clock-range = <334 667>; - /* buffer-size = <3621952>;(yuv422 8bit) */ - buffer-size = <4074560>;/*yuv422 fullpack*/ - /* reserve-iomap = "true"; */ - /* if enable nr10bit, set nr10bit-support to 1 */ - post-wr-support = <1>; - nr10bit-support = <1>; - nrds-enable = <1>; - pps-enable = <1>; - }; - - vout { - compatible = "amlogic, vout"; - status = "okay"; - fr_auto_policy = <0>; - }; - - /* Audio Related start */ - pdm_codec:dummy { - #sound-dai-cells = <0>; - compatible = "amlogic, pdm_dummy_codec"; - status = "okay"; - }; - - dummy_codec:dummy { - #sound-dai-cells = <0>; - compatible = "amlogic, aml_dummy_codec"; - status = "okay"; - }; - - tl1_codec:codec { - #sound-dai-cells = <0>; - compatible = "amlogic, tl1_acodec"; - status = "disabled"; - reg = <0xff632000 0x1c>; - tdmout_index = <1>; - }; - - aml_dtv_demod { - compatible = "amlogic, ddemod-tl1"; - dev_name = "aml_dtv_demod"; - status = "okay"; - - //pinctrl-names="dtvdemod_agc"; - //pinctrl-0=<&dtvdemod_agc>; - - clocks = <&clkc CLKID_DAC_CLK>; - clock-names = "vdac_clk_gate"; - - reg = <0xff650000 0x4000 /*dtv demod base*/ - 0xff63c000 0x2000 /*hiu reg base*/ - 0xff800000 0x1000 /*io_aobus_base*/ - 0xffd01000 0x1000 /*reset*/ - >; - - /*move from dvbfe*/ - dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? - spectrum = <1>; - cma_flag = <0>; - cma_mem_size = <8>; - memory-region = <&demod_reserved>;//<&demod_reserved>; - }; - - auge_sound { - compatible = "amlogic, tl1-sound-card"; - aml-audio-card,name = "AML-AUGESOUND"; - - aml-audio-card,dai-link@0 { - format = "i2s"; - mclk-fs = <256>; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - /* master mode */ - bitclock-master = <&tdma>; - frame-master = <&tdma>; - /* slave mode */ - /* - * bitclock-master = <&tdmacodec>; - * frame-master = <&tdmacodec>; - */ - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-pcm"; - tdmacpu: cpu { - sound-dai = <&tdma>; - dai-tdm-slot-tx-mask = - <1 1>; - dai-tdm-slot-rx-mask = - <1 1>; - dai-tdm-slot-num = <2>; - dai-tdm-slot-width = <32>; - system-clock-frequency = <12288000>; - }; - tdmacodec: codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@1 { - format = "i2s"; - mclk-fs = <256>; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - /* master mode */ - bitclock-master = <&tdmb>; - frame-master = <&tdmb>; - /* slave mode */ - //bitclock-master = <&tdmbcodec>; - //frame-master = <&tdmbcodec>; - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-i2s"; - cpu { - sound-dai = <&tdmb>; - dai-tdm-slot-tx-mask = <1 1>; - dai-tdm-slot-rx-mask = <1 1>; - dai-tdm-slot-num = <2>; - /* - * dai-tdm-slot-tx-mask = - * <1 1 1 1 1 1 1 1>; - * dai-tdm-slot-rx-mask = - * <1 1 1 1 1 1 1 1>; - * dai-tdm-slot-num = <8>; - */ - dai-tdm-slot-width = <32>; - system-clock-frequency = <12288000>; - }; - tdmbcodec: codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@2 { - format = "i2s"; - mclk-fs = <256>; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - /* master mode */ - bitclock-master = <&tdmc>; - frame-master = <&tdmc>; - /* slave mode */ - //bitclock-master = <&tdmccodec>; - //frame-master = <&tdmccodec>; - /* suffix-name, sync with android audio hal used for */ - //suffix-name = "alsaPORT-tdm"; - cpu { - sound-dai = <&tdmc>; - dai-tdm-slot-tx-mask = <1 1>; - dai-tdm-slot-rx-mask = <1 1>; - dai-tdm-slot-num = <2>; - dai-tdm-slot-width = <32>; - system-clock-frequency = <12288000>; - }; - tdmccodec: codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@3 { - mclk-fs = <64>; - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-pdm"; - cpu { - sound-dai = <&pdm>; - }; - codec { - sound-dai = <&pdm_codec>; - }; - }; - - aml-audio-card,dai-link@4 { - mclk-fs = <128>; - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-spdif"; - cpu { - sound-dai = <&spdifa>; - system-clock-frequency = <6144000>; - }; - codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@5 { - mclk-fs = <128>; - cpu { - sound-dai = <&spdifb>; - system-clock-frequency = <6144000>; - }; - codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@6 { - mclk-fs = <256>; - cpu { - sound-dai = <&extn>; - system-clock-frequency = <12288000>; - }; - codec { - sound-dai = <&dummy_codec>; - }; - }; - - }; - - /* Audio Related end */ - dvb { - compatible = "amlogic, dvb"; - status = "okay"; - fe0_mode = "internal"; - fe0_tuner = <&tuner>; - - /*"parallel","serial","disable"*/ - ts2 = "parallel"; - ts2_control = <0>; - ts2_invert = <0>; - interrupts = <0 23 1 - 0 5 1 - 0 53 1 - 0 19 1 - 0 25 1 - 0 17 1>; - interrupt-names = "demux0_irq", - "demux1_irq", - "demux2_irq", - "dvr0_irq", - "dvr1_irq", - "dvr2_irq"; - clocks = <&clkc CLKID_DEMUX - &clkc CLKID_ASYNC_FIFO - &clkc CLKID_AHB_ARB0 - /*&clkc CLKID_DOS_PARSER>;*/ - &clkc CLKID_U_PARSER>; - clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; - }; - - tvafe_avin_detect { - compatible = "amlogic, tl1_tvafe_avin_detect"; - status = "okay"; - device_mask = <1>;/*bit0:ch1;bit1:ch2*/ - interrupts = <0 12 1>, - <0 13 1>; - }; - - amlvecm { - compatible = "amlogic, vecm"; - dev_name = "aml_vecm"; - status = "okay"; - gamma_en = <1>;/*1:enabel ;0:disable*/ - wb_en = <1>;/*1:enabel ;0:disable*/ - cm_en = <1>;/*1:enabel ;0:disable*/ - wb_sel = <1>;/*1:mtx ;0:gainoff*/ - vlock_en = <1>;/*1:enable;0:disable*/ - vlock_mode = <0x4>; - /* vlock work mode: - *bit0:auto ENC - *bit1:auto PLL - *bit2:manual PLL - *bit3:manual ENC - *bit4:manual soft ENC - *bit5:manual MIX PLL ENC - */ - vlock_pll_m_limit = <1>; - vlock_line_limit = <3>; - }; - - vdin@0 { - compatible = "amlogic, vdin"; - /*memory-region = <&vdin0_cma_reserved>;*/ - status = "okay"; - /*bit0:(1:share with codec_mm;0:cma alone) - *bit8:(1:alloc in discontinus way;0:alone in continuous way) - */ - flag_cma = <0x101>; - /*MByte, if 10bit disable: 64M(YUV422), - *if 10bit enable: 64*1.5 = 96M(YUV422) - *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M - *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M - *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M - *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M - */ - cma_size = <190>; - interrupts = <0 83 1>; - rdma-irq = <2>; - clocks = <&clkc CLKID_FCLK_DIV5>, - <&clkc CLKID_VDIN_MEAS_COMP>; - clock-names = "fclk_div5", "cts_vdin_meas_clk"; - vdin_id = <0>; - /*vdin write mem color depth support: - * bit0:support 8bit - * bit1:support 9bit - * bit2:support 10bit - * bit3:support 12bit - * bit4:support yuv422 10bit full pack mode (from txl new add) - * bit8:use 8bit at 4k_50/60hz_10bit - * bit9:use 10bit at 4k_50/60hz_10bit - */ - tv_bit_mode = <0x215>; - /* afbce_bit_mode: (amlogic frame buff compression encoder) - * bit 0~3: - * 0 -- normal mode, not use afbce - * 1 -- use afbce non-mmu mode - * 2 -- use afbce mmu mode - * bit 4: - * 0 -- afbce compression-lossy disable - * 1 -- afbce compression-lossy enable - */ - afbce_bit_mode = <0>; - }; - - vdin@1 { - compatible = "amlogic, vdin"; - memory-region = <&vdin1_cma_reserved>; - status = "okay"; - /*bit0:(1:share with codec_mm;0:cma alone) - *bit8:(1:alloc in discontinus way;0:alone in continuous way) - */ - flag_cma = <0>; - interrupts = <0 85 1>; - rdma-irq = <4>; - clocks = <&clkc CLKID_FCLK_DIV5>, - <&clkc CLKID_VDIN_MEAS_COMP>; - clock-names = "fclk_div5", "cts_vdin_meas_clk"; - vdin_id = <1>; - /*vdin write mem color depth support: - *bit0:support 8bit - *bit1:support 9bit - *bit2:support 10bit - *bit3:support 12bit - */ - tv_bit_mode = <0x15>; - }; - - tvafe { - compatible = "amlogic, tvafe-tl1"; - /*memory-region = <&tvafe_cma_reserved>;*/ - dev_name = "tvafe"; - status = "okay"; - flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ - cma_size = <5>;/*MByte*/ - reg = <0xff654000 0x2000>;/*tvafe reg base*/ - reserve-iomap = "true"; - tvafe_id = <0>; - //pinctrl-names = "default"; - /*!!particular sequence, no more and no less!!!*/ - tvafe_pin_mux = < - 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ - 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ - 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ - 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ - >; - clocks = <&clkc CLKID_DAC_CLK>; - clock-names = "vdac_clk_gate"; - }; - - vbi { - compatible = "amlogic, vbi"; - memory-region = <&vbi_reserved>; - dev_name = "vbi"; - status = "okay"; - interrupts = <0 83 1>; - reserve-iomap = "true"; - }; - - unifykey { - compatible = "amlogic, unifykey"; - status = "okay"; - - unifykey-num = <19>; - unifykey-index-0 = <&keysn_0>; - unifykey-index-1 = <&keysn_1>; - unifykey-index-2 = <&keysn_2>; - unifykey-index-3 = <&keysn_3>; - unifykey-index-4 = <&keysn_4>; - unifykey-index-5 = <&keysn_5>; - unifykey-index-6 = <&keysn_6>; - unifykey-index-7 = <&keysn_7>; - unifykey-index-8 = <&keysn_8>; - unifykey-index-9 = <&keysn_9>; - unifykey-index-10= <&keysn_10>; - unifykey-index-11 = <&keysn_11>; - unifykey-index-12 = <&keysn_12>; - unifykey-index-13 = <&keysn_13>; - unifykey-index-14 = <&keysn_14>; - unifykey-index-15 = <&keysn_15>; - unifykey-index-16 = <&keysn_16>; - unifykey-index-17 = <&keysn_17>; - unifykey-index-18 = <&keysn_18>; - - keysn_0: key_0{ - key-name = "usid"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_1:key_1{ - key-name = "mac"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_2:key_2{ - key-name = "hdcp"; - key-device = "secure"; - key-type = "sha1"; - key-permit = "read","write","del"; - }; - keysn_3:key_3{ - key-name = "secure_boot_set"; - key-device = "efuse"; - key-permit = "write"; - }; - keysn_4:key_4{ - key-name = "mac_bt"; - key-device = "normal"; - key-permit = "read","write","del"; - key-type = "mac"; - }; - keysn_5:key_5{ - key-name = "mac_wifi"; - key-device = "normal"; - key-permit = "read","write","del"; - key-type = "mac"; - }; - keysn_6:key_6{ - key-name = "hdcp2_tx"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_7:key_7{ - key-name = "hdcp2_rx"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_8:key_8{ - key-name = "widevinekeybox"; - key-device = "secure"; - key-type = "sha1"; - key-permit = "read","write","del"; - }; - keysn_9:key_9{ - key-name = "deviceid"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_10:key_10{ - key-name = "hdcp22_fw_private"; - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_11:key_11{ - key-name = "hdcp22_rx_private"; - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_12:key_12{ - key-name = "hdcp22_rx_fw"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_13:key_13{ - key-name = "hdcp14_rx"; - key-device = "normal"; - key-type = "sha1"; - key-permit = "read","write","del"; - }; - keysn_14:key_14{ - key-name = "prpubkeybox";// PlayReady - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_15:key_15{ - key-name = "prprivkeybox";// PlayReady - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_16:key_16{ - key-name = "lcd"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_17:key_17{ - key-name = "lcd_extern"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_18:key_18{ - key-name = "backlight"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - }; /* End unifykey */ - - hdmirx { - compatible = "amlogic, hdmirx_tl1"; - #address-cells=<1>; - #size-cells=<1>; - memory-region = <&hdmirx_emp_cma_reserved>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux - &hdmirx_c_mux>; - repeat = <0>; - interrupts = <0 41 1>; - clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, - <&clkc CLKID_HDMIRX_CFG_COMP>, - <&clkc CLKID_HDMIRX_ACR_COMP>, - <&clkc CLKID_HDMIRX_METER_COMP>, - <&clkc CLKID_HDMIRX_AXI_COMP>, - <&xtal>, - <&clkc CLKID_FCLK_DIV5>, - <&clkc CLKID_FCLK_DIV7>, - <&clkc CLKID_HDCP22_SKP_COMP>, - <&clkc CLKID_HDCP22_ESM_COMP>; - // <&clkc CLK_AUD_PLL2FS>, - // <&clkc CLK_AUD_PLL4FS>, - // <&clkc CLK_AUD_OUT>; - clock-names = "hdmirx_modet_clk", - "hdmirx_cfg_clk", - "hdmirx_acr_ref_clk", - "cts_hdmirx_meter_clk", - "cts_hdmi_axi_clk", - "xtal", - "fclk_div5", - "fclk_div7", - "hdcp_rx22_skp", - "hdcp_rx22_esm"; - // "hdmirx_aud_pll2fs", - // "hdmirx_aud_pll4f", - // "clk_aud_out"; - hdmirx_id = <0>; - en_4k_2_2k = <0>; - hpd_low_cec_off = <1>; - /* bit4: enable feature, bit3~0: port number */ - disable_port = <0x0>; - /* MAP_ADDR_MODULE_CBUS */ - /* MAP_ADDR_MODULE_HIU */ - /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */ - /* MAP_ADDR_MODULE_SEC_AHB */ - /* MAP_ADDR_MODULE_SEC_AHB2 */ - /* MAP_ADDR_MODULE_APB4 */ - /* MAP_ADDR_MODULE_TOP */ - reg = < 0x0 0x0 - 0xff63C000 0x2000 - 0xffe0d000 0x2000 - 0x0 0x0 - 0x0 0x0 - 0x0 0x0 - 0xff610000 0xa000>; - }; - - aocec: aocec { - compatible = "amlogic, aocec-tl1"; - /*device_name = "aocec";*/ - status = "okay"; - vendor_name = "Amlogic"; /* Max Chars: 8 */ - /* Refer to the following URL at: - * http://standards.ieee.org/develop/regauth/oui/oui.txt - */ - vendor_id = <0x000000>; - product_desc = "TL1"; /* Max Chars: 16 */ - cec_osd_string = "AML_TV"; /* Max Chars: 14 */ - port_num = <3>; - ee_cec; - arc_port_mask = <0x2>; - interrupts = <0 205 1 - 0 199 1>; - interrupt-names = "hdmi_aocecb","hdmi_aocec"; - pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; - pinctrl-0=<&aoceca_mux>; - pinctrl-1=<&aocecb_mux>; - pinctrl-2=<&aoceca_mux>; - reg = <0xFF80023c 0x4 - 0xFF800000 0x400>; - reg-names = "ao_exit","ao"; - }; - - p_tsensor: p_tsensor@ff634800 { - compatible = "amlogic, r1p1-tsensor"; - status = "okay"; - reg = <0xff634800 0x50>, - <0xff800268 0x4>; - cal_type = <0x1>; - cal_a = <324>; - cal_b = <424>; - cal_c = <3159>; - cal_d = <9411>; - rtemp = <115000>; - interrupts = <0 35 0>; - clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ - clock-names = "ts_comp"; - #thermal-sensor-cells = <1>; - }; - - d_tsensor: d_tsensor@ff634c00 { - compatible = "amlogic, r1p1-tsensor"; - status = "okay"; - reg = <0xff634c00 0x50>, - <0xff800230 0x4>; - cal_type = <0x1>; - cal_a = <324>; - cal_b = <424>; - cal_c = <3159>; - cal_d = <9411>; - rtemp = <115000>; - interrupts = <0 36 0>; - clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ - clock-names = "ts_comp"; - #thermal-sensor-cells = <1>; - }; - - meson_cooldev: meson-cooldev@0 { - status = "okay"; - compatible = "amlogic, meson-cooldev"; - cooling_devices { - cpufreq_cool_cluster0 { - min_state = <1000000>; - dyn_coeff = <115>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "cpufreq_cool0"; - device_type = "cpufreq"; - }; - cpucore_cool_cluster0 { - min_state = <1>; - dyn_coeff = <0>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "cpucore_cool0"; - device_type = "cpucore"; - }; - gpufreq_cool { - min_state = <400>; - dyn_coeff = <358>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "gpufreq_cool0"; - device_type = "gpufreq"; - }; - gpucore_cool { - min_state = <1>; - dyn_coeff = <0>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "gpucore_cool0"; - device_type = "gpucore"; - }; - }; - cpufreq_cool0:cpufreq_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - cpucore_cool0:cpucore_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - gpufreq_cool0:gpufreq_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - gpucore_cool0:gpucore_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - };/*meson cooling devices end*/ - - thermal-zones { - pll_thermal: pll_thermal { - polling-delay = <1000>; - polling-delay-passive = <100>; - sustainable-power = <1410>; - thermal-sensors = <&p_tsensor 0>; - trips { - pswitch_on: trip-point@0 { - temperature = <60000>; - hysteresis = <5000>; - type = "passive"; - }; - pcontrol: trip-point@1 { - temperature = <75000>; - hysteresis = <5000>; - type = "passive"; - }; - phot: trip-point@2 { - temperature = <85000>; - hysteresis = <5000>; - type = "hot"; - }; - pcritical: trip-point@3 { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - cooling-maps { - cpufreq_cooling_map { - trip = <&pcontrol>; - cooling-device = <&cpufreq_cool0 0 4>; - contribution = <1024>; - }; - gpufreq_cooling_map { - trip = <&pcontrol>; - cooling-device = <&gpufreq_cool0 0 4>; - contribution = <1024>; - }; - }; - }; - ddr_thermal: ddr_thermal { - polling-delay = <1000>; - polling-delay-passive = <250>; - sustainable-power = <1460>; - thermal-sensors = <&d_tsensor 1>; - trips { - dswitch_on: trip-point@0 { - temperature = <60000>; - hysteresis = <5000>; - type = "passive"; - }; - dcontrol: trip-point@1 { - temperature = <75000>; - hysteresis = <5000>; - type = "passive"; - }; - dhot: trip-point@2 { - temperature = <85000>; - hysteresis = <5000>; - type = "hot"; - }; - dcritical: trip-point@3 { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - };/*thermal zone end*/ - - /*DCDC for MP8756GD*/ - cpu_opp_table0: cpu_opp_table0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <731000>; - }; - opp01 { - opp-hz = /bits/ 64 <250000000>; - opp-microvolt = <731000>; - }; - opp02 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <731000>; - }; - opp03 { - opp-hz = /bits/ 64 <667000000>; - opp-microvolt = <761000>; - }; - opp04 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <791000>; - }; - opp05 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <801000>; - }; - opp06 { - opp-hz = /bits/ 64 <1404000000>; - opp-microvolt = <831000>; - }; - opp07 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <861000>; - }; - opp08 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <891000>; - }; - opp09 { - opp-hz = /bits/ 64 <1704000000>; - opp-microvolt = <921000>; - }; - opp10 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <981000>; - }; - opp11 { - opp-hz = /bits/ 64 <1908000000>; - opp-microvolt = <1011000>; - }; - }; - - cpufreq-meson { - compatible = "amlogic, cpufreq-meson"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm_ao_d_pins3>; - status = "okay"; - }; - - tuner: tuner { - status = "okay"; - tuner_name = "mxl661_tuner"; - tuner_i2c_adap = <&i2c0>; - tuner_i2c_addr = <0x60>; - tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */ - tuner_xtal_mode = <3>; - /* NO_SHARE_XTAL(0) - * SLAVE_XTAL_SHARE(3) - */ - tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */ - }; - - atv-demod { - compatible = "amlogic, atv-demod"; - status = "okay"; - tuner = <&tuner>; - btsc_sap_mode = <1>; - /* pinctrl-names="atvdemod_agc_pins"; */ - /* pinctrl-0=<&atvdemod_agc_pins>; */ - reg = <0xff656000 0x2000 /* demod reg */ - 0xff63c000 0x2000 /* hiu reg */ - 0xff634000 0x2000 /* periphs reg */ - 0xff64a000 0x2000>; /* audio reg */ - reg_23cf = <0x88188832>; - /*default:0x88188832;r840 on haier:0x48188832*/ - }; - - bt-dev{ - compatible = "amlogic, bt-dev"; - status = "okay"; - gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>; - }; - - wifi{ - compatible = "amlogic, aml_wifi"; - status = "okay"; - interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>; - irq_trigger_type = "GPIO_IRQ_LOW"; - dhd_static_buf; //dhd_static_buf support - power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm_b_pins1>; - pwm_config = <&wifi_pwm_conf>; - }; - - wifi_pwm_conf:wifi_pwm_conf{ - pwm_channel1_conf { - pwms = <&pwm_ab MESON_PWM_1 30040 0>; - duty-cycle = <15020>; - times = <8>; - }; - pwm_channel2_conf { - pwms = <&pwm_ab MESON_PWM_3 30030 0>; - duty-cycle = <15015>; - times = <12>; - }; - }; -}; /* end of / */ - -&i2c0 { - status = "okay"; - clock-frequency = <300000>; - pinctrl-names="default"; - pinctrl-0=<&i2c0_dv_pins>; -}; - -&audiobus { - tdma:tdm@0 { - compatible = "amlogic, tl1-snd-tdma"; - #sound-dai-cells = <0>; - - dai-tdm-lane-slot-mask-in = <1 0>; - dai-tdm-lane-slot-mask-out = <1 0>; - dai-tdm-clk-sel = <0>; - - clocks = <&clkaudio CLKID_AUDIO_MCLK_A - &clkc CLKID_MPLL0>; - clock-names = "mclk", "clk_srcpll"; - - pinctrl-names = "tdm_pins"; - pinctrl-0 = <&tdma_mclk &tdmout_a &tdmin_a>; - - status = "okay"; - }; - - tdmb:tdm@1 { - compatible = "amlogic, tl1-snd-tdmb"; - #sound-dai-cells = <0>; - - dai-tdm-lane-slot-mask-in = <1 0 0 0>; - dai-tdm-lane-slot-mask-out = <1 0 0 0>; - dai-tdm-clk-sel = <1>; - - clocks = <&clkaudio CLKID_AUDIO_MCLK_B - &clkc CLKID_MPLL1>; - clock-names = "mclk", "clk_srcpll"; - - status = "okay"; - }; - - tdmc:tdm@2 { - compatible = "amlogic, tl1-snd-tdmc"; - #sound-dai-cells = <0>; - - dai-tdm-lane-slot-mask-in = <1 0 0 0>; - dai-tdm-lane-slot-mask-out = <1 0 0 0>; - dai-tdm-clk-sel = <2>; - - clocks = <&clkaudio CLKID_AUDIO_MCLK_C - &clkc CLKID_MPLL2>; - clock-names = "mclk", "clk_srcpll"; - - pinctrl-names = "tdm_pins"; - pinctrl-0 = <&tdmout_c &tdmin_c>; - - status = "okay"; - }; - - spdifa:spdif@0 { - compatible = "amlogic, tl1-snd-spdif-a"; - #sound-dai-cells = <0>; - - clocks = <&clkc CLKID_MPLL0 - &clkc CLKID_FCLK_DIV4 - &clkaudio CLKID_AUDIO_GATE_SPDIFIN - &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A - &clkaudio CLKID_AUDIO_SPDIFIN - &clkaudio CLKID_AUDIO_SPDIFOUT_A>; - clock-names = "sysclk", "fixed_clk", "gate_spdifin", - "gate_spdifout", "clk_spdifin", "clk_spdifout"; - - interrupts = - ; - interrupt-names = "irq_spdifin"; - - pinctrl-names = "spdif_pins"; - pinctrl-0 = <&spdifout_a &spdifin_a>; - - /* - * whether do asrc for pcm and resample a or b - * if raw data, asrc is disabled automatically - * 0: "Disable", - * 1: "Enable:32K", - * 2: "Enable:44K", - * 3: "Enable:48K", - * 4: "Enable:88K", - * 5: "Enable:96K", - * 6: "Enable:176K", - * 7: "Enable:192K", - */ - asrc_id = <0>; - auto_asrc = <0>; - - status = "okay"; - }; - - spdifb:spdif@1 { - compatible = "amlogic, tl1-snd-spdif-b"; - #sound-dai-cells = <0>; - - clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ - &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B - &clkaudio CLKID_AUDIO_SPDIFOUT_B>; - clock-names = "sysclk", - "gate_spdifout", "clk_spdifout"; - - status = "okay"; - }; - - pdm:pdm { - compatible = "amlogic, tl1-snd-pdm"; - #sound-dai-cells = <0>; - - clocks = <&clkaudio CLKID_AUDIO_GATE_PDM - &clkc CLKID_FCLK_DIV3 - &clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_PDMIN0 - &clkaudio CLKID_AUDIO_PDMIN1>; - clock-names = "gate", - "sysclk_srcpll", - "dclk_srcpll", - "pdm_dclk", - "pdm_sysclk"; - - pinctrl-names = "pdm_pins"; - pinctrl-0 = <&pdmin>; - - /* mode 0~4, defalut:1 */ - filter_mode = <1>; - - status = "okay"; - }; - - extn:extn { - compatible = "amlogic, snd-extn"; - #sound-dai-cells = <0>; - - interrupts = - ; - interrupt-names = "irq_frhdmirx"; - - status = "okay"; - }; - - aed:effect { - compatible = "amlogic, snd-effect-v2"; - #sound-dai-cells = <0>; - - clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC - &clkc CLKID_FCLK_DIV5 - &clkaudio CLKID_AUDIO_EQDRC>; - clock-names = "gate", "srcpll", "eqdrc"; - - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; - /* - * 0:tdmout_a - * 1:tdmout_b - * 2:tdmout_c - * 3:spdifout - * 4:spdifout_b - */ - eqdrc_module = <0>; - /* max 0xf, each bit for one lane, usually one lane */ - lane_mask = <0x1>; - /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; - - status = "okay"; - }; - - asrca: resample@0 { - compatible = "amlogic, tl1-resample-a"; - clocks = <&clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_MCLK_F - &clkaudio CLKID_AUDIO_RESAMPLE_A>; - clock-names = "resample_pll", "resample_src", "resample_clk"; - /*same with toddr_src - * TDMIN_A, 0 - * TDMIN_B, 1 - * TDMIN_C, 2 - * SPDIFIN, 3 - * PDMIN, 4 - * NONE, - * TDMIN_LB, 6 - * LOOPBACK, 7 - */ - resample_module = <3>; - - status = "disabled"; - }; - - asrcb: resample@1 { - compatible = "amlogic, tl1-resample-b"; - - clocks = <&clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_MCLK_F - &clkaudio CLKID_AUDIO_RESAMPLE_B>; - clock-names = "resample_pll", "resample_src", "resample_clk"; - - /*same with toddr_src - * TDMIN_A, 0 - * TDMIN_B, 1 - * TDMIN_C, 2 - * SPDIFIN, 3 - * PDMIN, 4 - * NONE, - * TDMIN_LB, 6 - * LOOPBACK, 7 - */ - resample_module = <3>; - - status = "disabled"; - }; - -}; /* end of audiobus */ - -&pinctrl_periphs { - /* audio pin mux */ - - tdma_mclk: tdma_mclk { - mux { /* GPIOZ_0 */ - groups = "mclk0_z"; - function = "mclk0"; - }; - }; - - tdmout_a: tdmout_a { - mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3, GPIOZ_5, GPIOZ_6 */ - groups = "tdma_sclk_z", - "tdma_fs_z", - "tdma_dout0_z", - "tdma_dout2_z", - "tdma_dout3_z"; - function = "tdma_out"; - }; - }; - - tdmin_a: tdmin_a { - mux { /* GPIOZ_9 */ - groups = "tdma_din2_z"; - function = "tdma_in"; - }; - }; -#if 0 //verify tdm/i2s in - tdmin_a: tdmin_a { - mux { /* GPIOZ_7 */ - groups = "tdma_din0_z"; - function = "tdma_in"; - }; - }; -#endif - tdmout_c: tdmout_c { - mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */ - groups = "tdmc_sclk", - "tdmc_fs", - "tdmc_dout0"; - function = "tdmc_out"; - }; - }; - - tdmin_c: tdmin_c { - mux { /* GPIODV_10 */ - groups = "tdmc_din1"; - function = "tdmc_in"; - }; - }; - - spdifin_a: spdifin_a { - mux { /* GPIODV_5 */ - groups = "spdif_in"; - function = "spdif_in"; - }; - }; - - spdifout_a: spdifout_a { - mux { /* GPIODV_4 */ - groups = "spdif_out_dv4"; - function = "spdif_out"; - }; - }; - - pdmin: pdmin { - mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */ - groups = "pdm_dclk_z", - "pdm_din0_z", - "pdm_din2_z4"; - function = "pdm"; - }; - }; - - -}; /* end of pinctrl_periphs */ - -&pinctrl_aobus { - spdifout: spdifout { - mux { /* gpiao_10 */ - groups = "spdif_out_ao"; - function = "spdif_out_ao"; - }; - }; -}; /* end of pinctrl_aobus */ - -&audio_data{ - status = "okay"; -}; - -&sd_emmc_c { - status = "okay"; - emmc { - caps = "MMC_CAP_8_BIT_DATA", - "MMC_CAP_MMC_HIGHSPEED", - "MMC_CAP_SD_HIGHSPEED", - "MMC_CAP_NONREMOVABLE", - "MMC_CAP_1_8V_DDR", - "MMC_CAP_HW_RESET", - "MMC_CAP_ERASE", - "MMC_CAP_CMD23"; - caps2 = "MMC_CAP2_HS200"; - /* "MMC_CAP2_HS400";*/ - f_min = <400000>; - f_max = <200000000>; - }; -}; - -&sd_emmc_b { - status = "okay"; - sdio { - caps = "MMC_CAP_4_BIT_DATA", - "MMC_CAP_MMC_HIGHSPEED", - "MMC_CAP_SD_HIGHSPEED", - "MMC_CAP_NONREMOVABLE", /**ptm debug */ - "MMC_CAP_UHS_SDR12", - "MMC_CAP_UHS_SDR25", - "MMC_CAP_UHS_SDR50", - "MMC_CAP_UHS_SDR104", - "MMC_PM_KEEP_POWER", - "MMC_CAP_SDIO_IRQ"; - f_min = <400000>; - f_max = <200000000>; - }; -}; - -&spifc { - status = "disabled"; - spi-nor@0 { - cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>; - }; -}; - -&slc_nand { - status = "disabled"; - plat-names = "bootloader", "nandnormal"; - plat-num = <2>; - plat-part-0 = <&bootloader>; - plat-part-1 = <&nandnormal>; - bootloader: bootloader{ - enable_pad = "ce0"; - busy_pad = "rb0"; - timming_mode = "mode5"; - bch_mode = "bch8_1k"; - t_rea = <20>; - t_rhoh = <15>; - chip_num = <1>; - part_num = <0>; - rb_detect = <1>; - }; - nandnormal: nandnormal{ - enable_pad = "ce0"; - busy_pad = "rb0"; - timming_mode = "mode5"; - bch_mode = "bch8_1k"; - plane_mode = "twoplane"; - t_rea = <20>; - t_rhoh = <15>; - chip_num = <2>; - part_num = <3>; - partition = <&nand_partitions>; - rb_detect = <1>; - }; - nand_partitions:nand_partition{ - /* - * if bl_mode is 1, tpl size was generate by - * fip_copies * fip_size which - * will not skip bad when calculating - * the partition size; - * - * if bl_mode is 0, - * tpl partition must be comment out. - */ - tpl{ - offset=<0x0 0x0>; - size=<0x0 0x0>; - }; - logo{ - offset=<0x0 0x0>; - size=<0x0 0x200000>; - }; - recovery{ - offset=<0x0 0x0>; - size=<0x0 0x1000000>; - }; - boot{ - offset=<0x0 0x0>; - size=<0x0 0x1000000>; - }; - system{ - offset=<0x0 0x0>; - size=<0x0 0x4000000>; - }; - data{ - offset=<0xffffffff 0xffffffff>; - size=<0x0 0x0>; - }; - }; -}; - -ðmac { - status = "okay"; - pinctrl-names = "internal_eth_pins"; - pinctrl-0 = <&internal_eth_pins>; - mc_val = <0x4be04>; - - internal_phy=<1>; -}; - -&uart_A { - status = "okay"; -}; - -&dwc3 { - status = "okay"; -}; - -&usb2_phy_v2 { - status = "okay"; - portnum = <3>; -}; - -&usb3_phy_v2 { - status = "okay"; - portnum = <0>; - otg = <0>; -}; - -&dwc2_a { - status = "okay"; - /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ - controller-type = <1>; -}; - -&spicc0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spicc0_pins_h>; - cs-gpios = <&gpio GPIOH_20 0>; -}; - -&meson_fb { - status = "okay"; - display_size_default = <1920 1080 1920 2160 32>; - mem_size = <0x00800000 0x1980000 0x100000 0x800000>; - logo_addr = "0x7f800000"; - mem_alloc = <0>; - pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ -}; - -&pwm_AO_cd { - status = "okay"; -}; - -&saradc { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <300000>; - pinctrl-names="default"; - pinctrl-0=<&i2c1_h_pins>; - - lcd_extern_i2c0: lcd_extern_i2c@0 { - compatible = "lcd_ext, i2c"; - dev_name = "i2c_T5800Q"; - reg = <0x1c>; - status = "okay"; - }; - - lcd_extern_i2c1: lcd_extern_i2c@1 { - compatible = "lcd_ext, i2c"; - dev_name = "i2c_ANX6862"; - reg = <0x20>; - status = "okay"; - }; - - lcd_extern_i2c2: lcd_extern_i2c@2 { - compatible = "lcd_ext, i2c"; - dev_name = "i2c_ANX7911"; - reg = <0x74>; - status = "okay"; - }; -}; - -&pwm_ab { - status = "okay"; -}; - -&efuse { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts b/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts deleted file mode 100644 index 86d75f3..0000000 --- a/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts +++ /dev/null @@ -1,1601 +0,0 @@ -/* - * arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts - * - * Copyright (C) 2018 Amlogic, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - */ - -/dts-v1/; - -#include "mesontl1.dtsi" -#include "partition_mbox_normal_P_32.dtsi" -#include "mesontl1_x301-panel.dtsi" - -/ { - model = "Amlogic TL1 T962X2 X301"; - amlogic-dt-id = "tl1_t962x2_x301"; - compatible = "amlogic, tl1_t962x2_x301"; - - aliases { - serial0 = &uart_AO; - serial1 = &uart_A; - serial2 = &uart_B; - serial3 = &uart_C; - serial4 = &uart_AO_B; - tsensor0 = &p_tsensor; - tsensor1 = &d_tsensor; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c_AO; - }; - - memory@00000000 { - device_type = "memory"; - linux,usable-memory = <0x100000 0x7ff00000>; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - /* global autoconfigured region for contiguous allocations */ - secmon_reserved: linux,secmon { - compatible = "shared-dma-pool"; - reusable; - size = <0x400000>; - alignment = <0x400000>; - alloc-ranges = <0x05000000 0x400000>; - }; - - codec_mm_cma:linux,codec_mm_cma { - compatible = "shared-dma-pool"; - reusable; - /* ion_codec_mm max can alloc size 80M*/ - size = <0x13400000>; - alignment = <0x400000>; - linux,contiguous-region; - alloc-ranges = <0x12000000 0x13400000>; - }; - - /* codec shared reserved */ - codec_mm_reserved:linux,codec_mm_reserved { - compatible = "amlogic, codec-mm-reserved"; - size = <0x0>; - alignment = <0x100000>; - //no-map; - }; - - logo_reserved:linux,meson-fb { - compatible = "shared-dma-pool"; - reusable; - size = <0x800000>; - alignment = <0x400000>; - alloc-ranges = <0x7f800000 0x800000>; - }; - - ion_cma_reserved:linux,ion-dev { - compatible = "shared-dma-pool"; - reusable; - size = <0x8000000>; - alignment = <0x400000>; - }; - - /* vdin0 CMA pool */ - //vdin0_cma_reserved:linux,vdin0_cma { - // compatible = "shared-dma-pool"; - // reusable; - /* 3840x2160x4x4 ~=128 M */ - // size = <0xc400000>; - // alignment = <0x400000>; - //}; - - /* vdin1 CMA pool */ - vdin1_cma_reserved:linux,vdin1_cma { - compatible = "shared-dma-pool"; - reusable; - /* 1920x1080x2x4 =16 M */ - size = <0x1400000>; - alignment = <0x400000>; - }; - - /*di CMA pool */ - di_cma_reserved:linux,di_cma { - compatible = "shared-dma-pool"; - reusable; - /* buffer_size = 3621952(yuv422 8bit) - * | 4736064(yuv422 10bit) - * | 4074560(yuv422 10bit full pack mode) - * 10x3621952=34.6M(0x23) support 8bit - * 10x4736064=45.2M(0x2e) support 12bit - * 10x4074560=40M(0x28) support 10bit - */ - size = <0x02800000>; - alignment = <0x400000>; - }; - - demod_reserved:linux,demod { - compatible = "amlogic, demod-mem"; - size = <0x800000>; //8M //100m 0x6400000 - alloc-ranges = <0x0 0x30000000>; - //multi-use; - //no-map; - }; - - /*vbi reserved mem*/ - vbi_reserved:linux,vbi { - compatible = "amlogic, vbi-mem"; - size = <0x100000>; - alloc-ranges = <0x0e000000 0x800000>; - }; - - /* for hdmi rx emp use */ - hdmirx_emp_cma_reserved:linux,emp_cma { - compatible = "shared-dma-pool"; - /*linux,phandle = <5>;*/ - reusable; - /* 4M for emp to ddr */ - /* 32M for tmds to ddr */ - size = <0x2000000>; - alignment = <0x400000>; - /* alloc-ranges = <0x400000 0x2000000>; */ - }; - - /* POST PROCESS MANAGER */ - ppmgr_reserved:linux,ppmgr { - compatible = "amlogic, ppmgr_memory"; - size = <0x0>; - }; - }; /* end of reserved-memory */ - - codec_mm { - compatible = "amlogic, codec, mm"; - status = "okay"; - memory-region = <&codec_mm_cma &codec_mm_reserved>; - }; - - ppmgr { - compatible = "amlogic, ppmgr"; - memory-region = <&ppmgr_reserved>; - status = "okay"; - }; - - deinterlace { - compatible = "amlogic, deinterlace"; - status = "okay"; - /* 0:use reserved; 1:use cma; 2:use cma as reserved */ - flag_cma = <1>; - //memory-region = <&di_reserved>; - memory-region = <&di_cma_reserved>; - interrupts = <0 46 1 - 0 40 1>; - interrupt-names = "pre_irq", "post_irq"; - clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>, - <&clkc CLKID_VPU_CLKB_COMP>; - clock-names = "vpu_clkb_tmp_composite", - "vpu_clkb_composite"; - clock-range = <334 667>; - /* buffer-size = <3621952>;(yuv422 8bit) */ - buffer-size = <4074560>;/*yuv422 fullpack*/ - /* reserve-iomap = "true"; */ - /* if enable nr10bit, set nr10bit-support to 1 */ - post-wr-support = <1>; - nr10bit-support = <1>; - nrds-enable = <1>; - pps-enable = <1>; - }; - - vout { - compatible = "amlogic, vout"; - status = "okay"; - fr_auto_policy = <0>; - }; - - /* Audio Related start */ - pdm_codec:dummy { - #sound-dai-cells = <0>; - compatible = "amlogic, pdm_dummy_codec"; - status = "okay"; - }; - - dummy_codec:dummy { - #sound-dai-cells = <0>; - compatible = "amlogic, aml_dummy_codec"; - status = "okay"; - }; - - tl1_codec:codec { - #sound-dai-cells = <0>; - compatible = "amlogic, tl1_acodec"; - status = "disabled"; - reg = <0xff632000 0x1c>; - tdmout_index = <1>; - }; - - aml_dtv_demod { - compatible = "amlogic, ddemod-tl1"; - dev_name = "aml_dtv_demod"; - status = "okay"; - - //pinctrl-names="dtvdemod_agc"; - //pinctrl-0=<&dtvdemod_agc>; - - clocks = <&clkc CLKID_DAC_CLK>; - clock-names = "vdac_clk_gate"; - - reg = <0xff650000 0x4000 /*dtv demod base*/ - 0xff63c000 0x2000 /*hiu reg base*/ - 0xff800000 0x1000 /*io_aobus_base*/ - 0xffd01000 0x1000 /*reset*/ - >; - - dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? - spectrum = <1>; - cma_flag = <0>; - cma_mem_size = <8>; - memory-region = <&demod_reserved>;//<&demod_reserved>; - }; - - auge_sound { - compatible = "amlogic, tl1-sound-card"; - aml-audio-card,name = "AML-AUGESOUND"; - - aml-audio-card,dai-link@0 { - format = "i2s"; - mclk-fs = <256>; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - /* master mode */ - bitclock-master = <&tdma>; - frame-master = <&tdma>; - /* slave mode */ - /* - * bitclock-master = <&tdmacodec>; - * frame-master = <&tdmacodec>; - */ - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-i2s"; - tdmacpu: cpu { - sound-dai = <&tdma>; - dai-tdm-slot-tx-mask = - <1 1>; - dai-tdm-slot-rx-mask = - <1 1>; - dai-tdm-slot-num = <2>; - dai-tdm-slot-width = <32>; - system-clock-frequency = <12288000>; - }; - tdmacodec: codec { - sound-dai = <&ad82584f>; - }; - }; - - aml-audio-card,dai-link@1 { - status = "disabled"; - - format = "i2s"; - mclk-fs = <256>; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - /* master mode */ - bitclock-master = <&tdmb>; - frame-master = <&tdmb>; - /* slave mode */ - //bitclock-master = <&tdmbcodec>; - //frame-master = <&tdmbcodec>; - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-pcm"; - cpu { - sound-dai = <&tdmb>; - dai-tdm-slot-tx-mask = <1 1>; - dai-tdm-slot-rx-mask = <1 1>; - dai-tdm-slot-num = <2>; - /* - * dai-tdm-slot-tx-mask = - * <1 1 1 1 1 1 1 1>; - * dai-tdm-slot-rx-mask = - * <1 1 1 1 1 1 1 1>; - * dai-tdm-slot-num = <8>; - */ - dai-tdm-slot-width = <32>; - system-clock-frequency = <12288000>; - }; - tdmbcodec: codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@2 { - status = "disabled"; - - format = "i2s"; - mclk-fs = <256>; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - /* master mode */ - bitclock-master = <&tdmc>; - frame-master = <&tdmc>; - /* slave mode */ - //bitclock-master = <&tdmccodec>; - //frame-master = <&tdmccodec>; - /* suffix-name, sync with android audio hal used for */ - //suffix-name = "alsaPORT-tdm"; - cpu { - sound-dai = <&tdmc>; - dai-tdm-slot-tx-mask = <1 1>; - dai-tdm-slot-rx-mask = <1 1>; - dai-tdm-slot-num = <2>; - dai-tdm-slot-width = <32>; - system-clock-frequency = <12288000>; - }; - tdmccodec: codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@3 { - mclk-fs = <64>; - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-pdm"; - cpu { - sound-dai = <&pdm>; - }; - codec { - sound-dai = <&pdm_codec>; - }; - }; - - aml-audio-card,dai-link@4 { - mclk-fs = <128>; - /* suffix-name, sync with android audio hal used for */ - suffix-name = "alsaPORT-spdif"; - cpu { - sound-dai = <&spdifa>; - system-clock-frequency = <6144000>; - }; - codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@5 { - mclk-fs = <128>; - cpu { - sound-dai = <&spdifb>; - system-clock-frequency = <6144000>; - }; - codec { - sound-dai = <&dummy_codec>; - }; - }; - - aml-audio-card,dai-link@6 { - mclk-fs = <256>; - suffix-name = "alsaPORT-tv"; - cpu { - sound-dai = <&extn>; - system-clock-frequency = <12288000>; - }; - codec { - sound-dai = <&dummy_codec>; - }; - }; - - }; - /* Audio Related end */ - - dvb { - compatible = "amlogic, dvb"; - status = "okay"; - fe0_mode = "internal"; - fe0_tuner = <&tuner>; - - /*"parallel","serial","disable"*/ - ts2 = "parallel"; - ts2_control = <0>; - ts2_invert = <0>; - interrupts = <0 23 1 - 0 5 1 - 0 53 1 - 0 19 1 - 0 25 1 - 0 17 1>; - interrupt-names = "demux0_irq", - "demux1_irq", - "demux2_irq", - "dvr0_irq", - "dvr1_irq", - "dvr2_irq"; - clocks = <&clkc CLKID_DEMUX - &clkc CLKID_ASYNC_FIFO - &clkc CLKID_AHB_ARB0 - /* &clkc CLKID_DOS_PARSER>; */ - &clkc CLKID_U_PARSER>; - clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; - }; - - tvafe_avin_detect { - compatible = "amlogic, tl1_tvafe_avin_detect"; - status = "okay"; - device_mask = <1>;/*bit0:ch1;bit1:ch2*/ - interrupts = <0 12 1>, - <0 13 1>; - }; - - amlvecm { - compatible = "amlogic, vecm"; - dev_name = "aml_vecm"; - status = "okay"; - gamma_en = <1>;/*1:enabel ;0:disable*/ - wb_en = <1>;/*1:enabel ;0:disable*/ - cm_en = <1>;/*1:enabel ;0:disable*/ - wb_sel = <1>;/*1:mtx ;0:gainoff*/ - vlock_en = <1>;/*1:enable;0:disable*/ - vlock_mode = <0x4>; - /* vlock work mode: - *bit0:auto ENC - *bit1:auto PLL - *bit2:manual PLL - *bit3:manual ENC - *bit4:manual soft ENC - *bit5:manual MIX PLL ENC - */ - vlock_pll_m_limit = <1>; - vlock_line_limit = <3>; - }; - - vdin@0 { - compatible = "amlogic, vdin"; - /*memory-region = <&vdin0_cma_reserved>;*/ - status = "okay"; - /*bit0:(1:share with codec_mm;0:cma alone) - *bit8:(1:alloc in discontinus way;0:alone in continuous way) - */ - flag_cma = <0x101>; - /*MByte, if 10bit disable: 64M(YUV422), - *if 10bit enable: 64*1.5 = 96M(YUV422) - *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M - *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M - *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M - *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M - */ - cma_size = <190>; - interrupts = <0 83 1>; - rdma-irq = <2>; - clocks = <&clkc CLKID_FCLK_DIV5>, - <&clkc CLKID_VDIN_MEAS_COMP>; - clock-names = "fclk_div5", "cts_vdin_meas_clk"; - vdin_id = <0>; - /*vdin write mem color depth support: - * bit0:support 8bit - * bit1:support 9bit - * bit2:support 10bit - * bit3:support 12bit - * bit4:support yuv422 10bit full pack mode (from txl new add) - * bit8:use 8bit at 4k_50/60hz_10bit - * bit9:use 10bit at 4k_50/60hz_10bit - */ - tv_bit_mode = <0x215>; - /* afbce_bit_mode: (amlogic frame buff compression encoder) - * bit 0~3: - * 0 -- normal mode, not use afbce - * 1 -- use afbce non-mmu mode - * 2 -- use afbce mmu mode - * bit 4: - * 0 -- afbce compression-lossy disable - * 1 -- afbce compression-lossy enable - */ - afbce_bit_mode = <0>; - }; - - vdin@1 { - compatible = "amlogic, vdin"; - memory-region = <&vdin1_cma_reserved>; - status = "okay"; - /*bit0:(1:share with codec_mm;0:cma alone) - *bit8:(1:alloc in discontinus way;0:alone in continuous way) - */ - flag_cma = <0>; - interrupts = <0 85 1>; - rdma-irq = <4>; - clocks = <&clkc CLKID_FCLK_DIV5>, - <&clkc CLKID_VDIN_MEAS_COMP>; - clock-names = "fclk_div5", "cts_vdin_meas_clk"; - vdin_id = <1>; - /*vdin write mem color depth support: - *bit0:support 8bit - *bit1:support 9bit - *bit2:support 10bit - *bit3:support 12bit - */ - tv_bit_mode = <0x15>; - }; - - tvafe { - compatible = "amlogic, tvafe-tl1"; - /*memory-region = <&tvafe_cma_reserved>;*/ - dev_name = "tvafe"; - status = "okay"; - flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ - cma_size = <5>;/*MByte*/ - reg = <0xff654000 0x2000>;/*tvafe reg base*/ - reserve-iomap = "true"; - tvafe_id = <0>; - //pinctrl-names = "default"; - /*!!particular sequence, no more and no less!!!*/ - tvafe_pin_mux = < - 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ - 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ - 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ - 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ - >; - clocks = <&clkc CLKID_DAC_CLK>; - clock-names = "vdac_clk_gate"; - }; - - vbi { - compatible = "amlogic, vbi"; - memory-region = <&vbi_reserved>; - dev_name = "vbi"; - status = "okay"; - interrupts = <0 83 1>; - reserve-iomap = "true"; - }; - - unifykey { - compatible = "amlogic, unifykey"; - status = "okay"; - - unifykey-num = <19>; - unifykey-index-0 = <&keysn_0>; - unifykey-index-1 = <&keysn_1>; - unifykey-index-2 = <&keysn_2>; - unifykey-index-3 = <&keysn_3>; - unifykey-index-4 = <&keysn_4>; - unifykey-index-5 = <&keysn_5>; - unifykey-index-6 = <&keysn_6>; - unifykey-index-7 = <&keysn_7>; - unifykey-index-8 = <&keysn_8>; - unifykey-index-9 = <&keysn_9>; - unifykey-index-10= <&keysn_10>; - unifykey-index-11 = <&keysn_11>; - unifykey-index-12 = <&keysn_12>; - unifykey-index-13 = <&keysn_13>; - unifykey-index-14 = <&keysn_14>; - unifykey-index-15 = <&keysn_15>; - unifykey-index-16 = <&keysn_16>; - unifykey-index-17 = <&keysn_17>; - unifykey-index-18 = <&keysn_18>; - - keysn_0: key_0{ - key-name = "usid"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_1:key_1{ - key-name = "mac"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_2:key_2{ - key-name = "hdcp"; - key-device = "secure"; - key-type = "sha1"; - key-permit = "read","write","del"; - }; - keysn_3:key_3{ - key-name = "secure_boot_set"; - key-device = "efuse"; - key-permit = "write"; - }; - keysn_4:key_4{ - key-name = "mac_bt"; - key-device = "normal"; - key-permit = "read","write","del"; - key-type = "mac"; - }; - keysn_5:key_5{ - key-name = "mac_wifi"; - key-device = "normal"; - key-permit = "read","write","del"; - key-type = "mac"; - }; - keysn_6:key_6{ - key-name = "hdcp2_tx"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_7:key_7{ - key-name = "hdcp2_rx"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_8:key_8{ - key-name = "widevinekeybox"; - key-device = "secure"; - key-type = "sha1"; - key-permit = "read","write","del"; - }; - keysn_9:key_9{ - key-name = "deviceid"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_10:key_10{ - key-name = "hdcp22_fw_private"; - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_11:key_11{ - key-name = "hdcp22_rx_private"; - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_12:key_12{ - key-name = "hdcp22_rx_fw"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_13:key_13{ - key-name = "hdcp14_rx"; - key-device = "normal"; - key-type = "sha1"; - key-permit = "read","write","del"; - }; - keysn_14:key_14{ - key-name = "prpubkeybox";// PlayReady - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_15:key_15{ - key-name = "prprivkeybox";// PlayReady - key-device = "secure"; - key-permit = "read","write","del"; - }; - keysn_16:key_16{ - key-name = "lcd"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_17:key_17{ - key-name = "lcd_extern"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - keysn_18:key_18{ - key-name = "backlight"; - key-device = "normal"; - key-permit = "read","write","del"; - }; - }; /* End unifykey */ - - hdmirx { - compatible = "amlogic, hdmirx_tl1"; - #address-cells=<1>; - #size-cells=<1>; - memory-region = <&hdmirx_emp_cma_reserved>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux - &hdmirx_c_mux>; - repeat = <0>; - interrupts = <0 41 1>; - clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, - <&clkc CLKID_HDMIRX_CFG_COMP>, - <&clkc CLKID_HDMIRX_ACR_COMP>, - <&clkc CLKID_HDMIRX_METER_COMP>, - <&clkc CLKID_HDMIRX_AXI_COMP>, - <&xtal>, - <&clkc CLKID_FCLK_DIV5>, - <&clkc CLKID_FCLK_DIV7>, - <&clkc CLKID_HDCP22_SKP_COMP>, - <&clkc CLKID_HDCP22_ESM_COMP>; - // <&clkc CLK_AUD_PLL2FS>, - // <&clkc CLK_AUD_PLL4FS>, - // <&clkc CLK_AUD_OUT>; - clock-names = "hdmirx_modet_clk", - "hdmirx_cfg_clk", - "hdmirx_acr_ref_clk", - "cts_hdmirx_meter_clk", - "cts_hdmi_axi_clk", - "xtal", - "fclk_div5", - "fclk_div7", - "hdcp_rx22_skp", - "hdcp_rx22_esm"; - // "hdmirx_aud_pll2fs", - // "hdmirx_aud_pll4f", - // "clk_aud_out"; - hdmirx_id = <0>; - en_4k_2_2k = <0>; - hpd_low_cec_off = <1>; - /* bit4: enable feature, bit3~0: port number */ - disable_port = <0x0>; - /* MAP_ADDR_MODULE_CBUS */ - /* MAP_ADDR_MODULE_HIU */ - /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */ - /* MAP_ADDR_MODULE_SEC_AHB */ - /* MAP_ADDR_MODULE_SEC_AHB2 */ - /* MAP_ADDR_MODULE_APB4 */ - /* MAP_ADDR_MODULE_TOP */ - reg = < 0x0 0x0 - 0xff63C000 0x2000 - 0xffe0d000 0x2000 - 0x0 0x0 - 0x0 0x0 - 0x0 0x0 - 0xff610000 0xa000>; - }; - - aocec: aocec { - compatible = "amlogic, aocec-tl1"; - /*device_name = "aocec";*/ - status = "okay"; - vendor_name = "Amlogic"; /* Max Chars: 8 */ - /* Refer to the following URL at: - * http://standards.ieee.org/develop/regauth/oui/oui.txt - */ - vendor_id = <0x000000>; - product_desc = "TL1"; /* Max Chars: 16 */ - cec_osd_string = "AML_TV"; /* Max Chars: 14 */ - port_num = <3>; - ee_cec; - arc_port_mask = <0x2>; - interrupts = <0 205 1 - 0 199 1>; - interrupt-names = "hdmi_aocecb","hdmi_aocec"; - pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; - pinctrl-0=<&aoceca_mux>; - pinctrl-1=<&aocecb_mux>; - pinctrl-2=<&aoceca_mux>; - reg = <0xFF80023c 0x4 - 0xFF800000 0x400>; - reg-names = "ao_exit","ao"; - }; - - p_tsensor: p_tsensor@ff634800 { - compatible = "amlogic, r1p1-tsensor"; - status = "okay"; - reg = <0xff634800 0x50>, - <0xff800268 0x4>; - cal_type = <0x1>; - cal_a = <324>; - cal_b = <424>; - cal_c = <3159>; - cal_d = <9411>; - rtemp = <115000>; - interrupts = <0 35 0>; - clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ - clock-names = "ts_comp"; - #thermal-sensor-cells = <1>; - }; - - d_tsensor: d_tsensor@ff634c00 { - compatible = "amlogic, r1p1-tsensor"; - status = "okay"; - reg = <0xff634c00 0x50>, - <0xff800230 0x4>; - cal_type = <0x1>; - cal_a = <324>; - cal_b = <424>; - cal_c = <3159>; - cal_d = <9411>; - rtemp = <115000>; - interrupts = <0 36 0>; - clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/ - clock-names = "ts_comp"; - #thermal-sensor-cells = <1>; - }; - - meson_cooldev: meson-cooldev@0 { - status = "okay"; - compatible = "amlogic, meson-cooldev"; - cooling_devices { - cpufreq_cool_cluster0 { - min_state = <1000000>; - dyn_coeff = <115>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "cpufreq_cool0"; - device_type = "cpufreq"; - }; - cpucore_cool_cluster0 { - min_state = <1>; - dyn_coeff = <0>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "cpucore_cool0"; - device_type = "cpucore"; - }; - gpufreq_cool { - min_state = <400>; - dyn_coeff = <358>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "gpufreq_cool0"; - device_type = "gpufreq"; - }; - gpucore_cool { - min_state = <1>; - dyn_coeff = <0>; - gpu_pp = <2>; - cluster_id = <0>; - node_name = "gpucore_cool0"; - device_type = "gpucore"; - }; - }; - cpufreq_cool0:cpufreq_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - cpucore_cool0:cpucore_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - gpufreq_cool0:gpufreq_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - gpucore_cool0:gpucore_cool0 { - #cooling-cells = <2>; /* min followed by max */ - }; - };/*meson cooling devices end*/ - - thermal-zones { - pll_thermal: pll_thermal { - polling-delay = <1000>; - polling-delay-passive = <100>; - sustainable-power = <1410>; - thermal-sensors = <&p_tsensor 0>; - trips { - pswitch_on: trip-point@0 { - temperature = <60000>; - hysteresis = <5000>; - type = "passive"; - }; - pcontrol: trip-point@1 { - temperature = <75000>; - hysteresis = <5000>; - type = "passive"; - }; - phot: trip-point@2 { - temperature = <85000>; - hysteresis = <5000>; - type = "hot"; - }; - pcritical: trip-point@3 { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - cooling-maps { - cpufreq_cooling_map { - trip = <&pcontrol>; - cooling-device = <&cpufreq_cool0 0 4>; - contribution = <1024>; - }; - gpufreq_cooling_map { - trip = <&pcontrol>; - cooling-device = <&gpufreq_cool0 0 4>; - contribution = <1024>; - }; - }; - }; - ddr_thermal: ddr_thermal { - polling-delay = <1000>; - polling-delay-passive = <250>; - sustainable-power = <1460>; - thermal-sensors = <&d_tsensor 1>; - trips { - dswitch_on: trip-point@0 { - temperature = <60000>; - hysteresis = <5000>; - type = "passive"; - }; - dcontrol: trip-point@1 { - temperature = <75000>; - hysteresis = <5000>; - type = "passive"; - }; - dhot: trip-point@2 { - temperature = <85000>; - hysteresis = <5000>; - type = "hot"; - }; - dcritical: trip-point@3 { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; /*thermal zone end*/ - - /*DCDC for MP8756GD*/ - cpu_opp_table0: cpu_opp_table0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <731000>; - }; - opp01 { - opp-hz = /bits/ 64 <250000000>; - opp-microvolt = <731000>; - }; - opp02 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <731000>; - }; - opp03 { - opp-hz = /bits/ 64 <667000000>; - opp-microvolt = <761000>; - }; - opp04 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <791000>; - }; - opp05 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <801000>; - }; - opp06 { - opp-hz = /bits/ 64 <1404000000>; - opp-microvolt = <831000>; - }; - opp07 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <861000>; - }; - opp08 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <891000>; - }; - opp09 { - opp-hz = /bits/ 64 <1704000000>; - opp-microvolt = <921000>; - }; - opp10 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <981000>; - }; - opp11 { - opp-hz = /bits/ 64 <1908000000>; - opp-microvolt = <1011000>; - }; - }; - - cpufreq-meson { - compatible = "amlogic, cpufreq-meson"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm_ao_d_pins3>; - status = "okay"; - }; - - tuner: tuner { - status = "okay"; - tuner_name = "mxl661_tuner"; - tuner_i2c_adap = <&i2c0>; - tuner_i2c_addr = <0x60>; - tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */ - tuner_xtal_mode = <3>; - /* NO_SHARE_XTAL(0) - * SLAVE_XTAL_SHARE(3) - */ - tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */ - }; - - atv-demod { - compatible = "amlogic, atv-demod"; - status = "okay"; - tuner = <&tuner>; - btsc_sap_mode = <1>; - /* pinctrl-names="atvdemod_agc_pins"; */ - /* pinctrl-0=<&atvdemod_agc_pins>; */ - reg = <0xff656000 0x2000 /* demod reg */ - 0xff63c000 0x2000 /* hiu reg */ - 0xff634000 0x2000 /* periphs reg */ - 0xff64a000 0x2000>; /* audio reg */ - reg_23cf = <0x88188832>; - /*default:0x88188832;r840 on haier:0x48188832*/ - }; - - bt-dev{ - compatible = "amlogic, bt-dev"; - status = "okay"; - gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>; - }; - - wifi{ - compatible = "amlogic, aml_wifi"; - status = "okay"; - interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>; - irq_trigger_type = "GPIO_IRQ_LOW"; - dhd_static_buf; //dhd_static_buf support - power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm_b_pins1>; - pwm_config = <&wifi_pwm_conf>; - }; - - wifi_pwm_conf:wifi_pwm_conf{ - pwm_channel1_conf { - pwms = <&pwm_ab MESON_PWM_1 30040 0>; - duty-cycle = <15020>; - times = <8>; - }; - pwm_channel2_conf { - pwms = <&pwm_ab MESON_PWM_3 30030 0>; - duty-cycle = <15015>; - times = <12>; - }; - }; -}; /* end of / */ - -&i2c0 { - status = "okay"; - clock-frequency = <300000>; - pinctrl-names="default"; - pinctrl-0=<&i2c0_dv_pins>; -}; - -&audiobus { - tdma:tdm@0 { - compatible = "amlogic, tl1-snd-tdma"; - #sound-dai-cells = <0>; - - #dai-tdm-lane-slot-mask-in = <1 0>; - dai-tdm-lane-slot-mask-out = <1 1 1 1>; - dai-tdm-clk-sel = <0>; - - clocks = <&clkaudio CLKID_AUDIO_MCLK_A - &clkc CLKID_MPLL0 - &clkc CLKID_MPLL1>; - clock-names = "mclk", "clk_srcpll", "samesource_sysclk"; - - pinctrl-names = "tdm_pins"; - pinctrl-0 = <&tdma_mclk &tdmout_a>; - - /* - * 0: tdmout_a; - * 1: tdmout_b; - * 2: tdmout_c; - * 3: spdifout; - * 4: spdifout_b; - */ - samesource_sel = <3>; - - status = "okay"; - }; - - tdmb:tdm@1 { - compatible = "amlogic, tl1-snd-tdmb"; - #sound-dai-cells = <0>; - - dai-tdm-lane-slot-mask-in = <1 0 0 0>; - dai-tdm-lane-slot-mask-out = <1 0 0 0>; - dai-tdm-clk-sel = <1>; - - clocks = <&clkaudio CLKID_AUDIO_MCLK_B - &clkc CLKID_MPLL1>; - clock-names = "mclk", "clk_srcpll"; - - status = "okay"; - }; - - tdmc:tdm@2 { - compatible = "amlogic, tl1-snd-tdmc"; - #sound-dai-cells = <0>; - - dai-tdm-lane-slot-mask-in = <1 0 0 0>; - dai-tdm-lane-slot-mask-out = <1 0 0 0>; - dai-tdm-clk-sel = <2>; - - clocks = <&clkaudio CLKID_AUDIO_MCLK_C - &clkc CLKID_MPLL2>; - clock-names = "mclk", "clk_srcpll"; - - pinctrl-names = "tdm_pins"; - pinctrl-0 = <&tdmout_c &tdmin_c>; - - status = "okay"; - }; - - spdifa:spdif@0 { - compatible = "amlogic, tl1-snd-spdif-a"; - #sound-dai-cells = <0>; - - clocks = <&clkc CLKID_MPLL0 - &clkc CLKID_FCLK_DIV4 - &clkaudio CLKID_AUDIO_GATE_SPDIFIN - &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A - &clkaudio CLKID_AUDIO_SPDIFIN - &clkaudio CLKID_AUDIO_SPDIFOUT_A>; - clock-names = "sysclk", "fixed_clk", "gate_spdifin", - "gate_spdifout", "clk_spdifin", "clk_spdifout"; - - interrupts = - ; - interrupt-names = "irq_spdifin"; - - pinctrl-names = "spdif_pins"; - pinctrl-0 = <&spdifout_a>; - - /* - * whether do asrc for pcm and resample a or b - * if raw data, asrc is disabled automatically - * 0: "Disable", - * 1: "Enable:32K", - * 2: "Enable:44K", - * 3: "Enable:48K", - * 4: "Enable:88K", - * 5: "Enable:96K", - * 6: "Enable:176K", - * 7: "Enable:192K", - */ - asrc_id = <0>; - auto_asrc = <0>; - - status = "okay"; - }; - - spdifb:spdif@1 { - compatible = "amlogic, tl1-snd-spdif-b"; - #sound-dai-cells = <0>; - - clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ - &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B - &clkaudio CLKID_AUDIO_SPDIFOUT_B>; - clock-names = "sysclk", - "gate_spdifout", "clk_spdifout"; - - status = "okay"; - }; - - pdm:pdm { - compatible = "amlogic, tl1-snd-pdm"; - #sound-dai-cells = <0>; - - clocks = <&clkaudio CLKID_AUDIO_GATE_PDM - &clkc CLKID_FCLK_DIV3 - &clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_PDMIN0 - &clkaudio CLKID_AUDIO_PDMIN1>; - clock-names = "gate", - "sysclk_srcpll", - "dclk_srcpll", - "pdm_dclk", - "pdm_sysclk"; - - pinctrl-names = "pdm_pins"; - pinctrl-0 = <&pdmin>; - - /* mode 0~4, defalut:1 */ - filter_mode = <1>; - - status = "okay"; - }; - - extn:extn { - compatible = "amlogic, snd-extn"; - #sound-dai-cells = <0>; - - interrupts = - ; - interrupt-names = "irq_frhdmirx"; - - status = "okay"; - }; - - aed:effect { - compatible = "amlogic, snd-effect-v2"; - #sound-dai-cells = <0>; - - clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC - &clkc CLKID_FCLK_DIV5 - &clkaudio CLKID_AUDIO_EQDRC>; - clock-names = "gate", "srcpll", "eqdrc"; - - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; - /* - * 0:tdmout_a - * 1:tdmout_b - * 2:tdmout_c - * 3:spdifout - * 4:spdifout_b - */ - eqdrc_module = <0>; - /* max 0xf, each bit for one lane, usually one lane */ - lane_mask = <0x1>; - /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; - - status = "okay"; - }; - - asrca: resample@0 { - compatible = "amlogic, tl1-resample-a"; - clocks = <&clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_MCLK_F - &clkaudio CLKID_AUDIO_RESAMPLE_A>; - clock-names = "resample_pll", "resample_src", "resample_clk"; - /*same with toddr_src - * TDMIN_A, 0 - * TDMIN_B, 1 - * TDMIN_C, 2 - * SPDIFIN, 3 - * PDMIN, 4 - * NONE, - * TDMIN_LB, 6 - * LOOPBACK, 7 - */ - resample_module = <3>; - - status = "disabled"; - }; - - asrcb: resample@1 { - compatible = "amlogic, tl1-resample-b"; - - clocks = <&clkc CLKID_MPLL3 - &clkaudio CLKID_AUDIO_MCLK_F - &clkaudio CLKID_AUDIO_RESAMPLE_B>; - clock-names = "resample_pll", "resample_src", "resample_clk"; - - /*same with toddr_src - * TDMIN_A, 0 - * TDMIN_B, 1 - * TDMIN_C, 2 - * SPDIFIN, 3 - * PDMIN, 4 - * NONE, - * TDMIN_LB, 6 - * LOOPBACK, 7 - */ - resample_module = <3>; - - status = "disabled"; - }; - -}; /* end of audiobus */ - -&pinctrl_periphs { - /* audio pin mux */ - - tdma_mclk: tdma_mclk { - mux { /* GPIOZ_0 */ - groups = "mclk0_z"; - function = "mclk0"; - }; - }; - - tdmout_a: tdmout_a { - mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */ - groups = "tdma_sclk_z", - "tdma_fs_z", - "tdma_dout0_z"; - function = "tdma_out"; - }; - }; - - tdmin_a: tdmin_a { - mux { /* GPIOZ_9 */ - groups = "tdma_din2_z"; - function = "tdma_in"; - }; - }; - - tdmout_c: tdmout_c { - mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */ - groups = "tdmc_sclk", - "tdmc_fs", - "tdmc_dout0"; - function = "tdmc_out"; - }; - }; - - tdmin_c: tdmin_c { - mux { /* GPIODV_10 */ - groups = "tdmc_din1"; - function = "tdmc_in"; - }; - }; - - spdifin_a: spdifin_a { - mux { /* GPIODV_5 */ - groups = "spdif_in"; - function = "spdif_in"; - }; - }; - - spdifout_a: spdifout_a { - mux { /* GPIODV_4 */ - groups = "spdif_out_dv4"; - function = "spdif_out"; - }; - }; - - pdmin: pdmin { - mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */ - groups = "pdm_dclk_z", - "pdm_din0_z", - "pdm_din2_z4"; - function = "pdm"; - }; - }; - - /*backlight*/ - bl_pwm_vs_on_pins:bl_pwm_vs_on_pin { - mux { - groups = "pwm_vs_z5"; - function = "pwm_vs"; - }; - }; - bl_pwm_off_pins:bl_pwm_off_pin { - mux { - groups = "GPIOZ_5"; - function = "gpio_periphs"; - output-low; - }; - }; - bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin { - mux { - groups = "pwm_vs_z5"; - function = "pwm_vs"; - }; - }; - bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin { - mux { - groups = "pwm_vs_z6"; - function = "pwm_vs"; - }; - }; - bl_pwm_combo_off_pins:bl_pwm_combo_off_pin { - mux { - groups = "GPIOZ_5", - "GPIOZ_6"; - function = "gpio_periphs"; - output-low; - }; - }; - -}; /* end of pinctrl_periphs */ - -&audio_data{ - status = "okay"; -}; - -&i2c2 { - status = "okay"; - pinctrl-names="default"; - pinctrl-0=<&i2c2_z_pins>; - clock-frequency = <400000>; - - ad82584f: ad82584f@62 { - compatible = "ESMT, ad82584f"; - #sound-dai-cells = <0>; - reg = <0x31>; - status = "okay"; - reset_pin = <&gpio_ao GPIOAO_6 0>; - }; - -}; - -&sd_emmc_c { - status = "okay"; - emmc { - caps = "MMC_CAP_8_BIT_DATA", - "MMC_CAP_MMC_HIGHSPEED", - "MMC_CAP_SD_HIGHSPEED", - "MMC_CAP_NONREMOVABLE", - "MMC_CAP_1_8V_DDR", - "MMC_CAP_HW_RESET", - "MMC_CAP_ERASE", - "MMC_CAP_CMD23"; - caps2 = "MMC_CAP2_HS200"; - /* "MMC_CAP2_HS400";*/ - f_min = <400000>; - f_max = <200000000>; - }; -}; - -&sd_emmc_b { - status = "okay"; - sdio { - caps = "MMC_CAP_4_BIT_DATA", - "MMC_CAP_MMC_HIGHSPEED", - "MMC_CAP_SD_HIGHSPEED", - "MMC_CAP_NONREMOVABLE", /**ptm debug */ - "MMC_CAP_UHS_SDR12", - "MMC_CAP_UHS_SDR25", - "MMC_CAP_UHS_SDR50", - "MMC_CAP_UHS_SDR104", - "MMC_PM_KEEP_POWER", - "MMC_CAP_SDIO_IRQ"; - f_min = <400000>; - f_max = <200000000>; - }; -}; - -&spifc { - status = "disabled"; - spi-nor@0 { - cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>; - }; -}; - -&slc_nand { - status = "disabled"; - plat-names = "bootloader", "nandnormal"; - plat-num = <2>; - plat-part-0 = <&bootloader>; - plat-part-1 = <&nandnormal>; - bootloader: bootloader{ - enable_pad = "ce0"; - busy_pad = "rb0"; - timming_mode = "mode5"; - bch_mode = "bch8_1k"; - t_rea = <20>; - t_rhoh = <15>; - chip_num = <1>; - part_num = <0>; - rb_detect = <1>; - }; - nandnormal: nandnormal{ - enable_pad = "ce0"; - busy_pad = "rb0"; - timming_mode = "mode5"; - bch_mode = "bch8_1k"; - plane_mode = "twoplane"; - t_rea = <20>; - t_rhoh = <15>; - chip_num = <2>; - part_num = <3>; - partition = <&nand_partitions>; - rb_detect = <1>; - }; - nand_partitions:nand_partition{ - /* - * if bl_mode is 1, tpl size was generate by - * fip_copies * fip_size which - * will not skip bad when calculating - * the partition size; - * - * if bl_mode is 0, - * tpl partition must be comment out. - */ - tpl{ - offset=<0x0 0x0>; - size=<0x0 0x0>; - }; - logo{ - offset=<0x0 0x0>; - size=<0x0 0x200000>; - }; - recovery{ - offset=<0x0 0x0>; - size=<0x0 0x1000000>; - }; - boot{ - offset=<0x0 0x0>; - size=<0x0 0x1000000>; - }; - system{ - offset=<0x0 0x0>; - size=<0x0 0x4000000>; - }; - data{ - offset=<0xffffffff 0xffffffff>; - size=<0x0 0x0>; - }; - }; -}; - -ðmac { - status = "okay"; - pinctrl-names = "internal_eth_pins"; - pinctrl-0 = <&internal_eth_pins>; - mc_val = <0x4be04>; - - internal_phy=<1>; -}; - -&uart_A { - status = "okay"; -}; - -&dwc3 { - status = "okay"; -}; - -&usb2_phy_v2 { - status = "okay"; - portnum = <3>; -}; - -&usb3_phy_v2 { - status = "okay"; - portnum = <0>; - otg = <0>; -}; - -&dwc2_a { - status = "okay"; - /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ - controller-type = <1>; -}; - -&spicc0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spicc0_pins_h>; - cs-gpios = <&gpio GPIOH_20 0>; -}; - -&meson_fb { - status = "okay"; - display_size_default = <1920 1080 1920 2160 32>; - mem_size = <0x00800000 0x1980000 0x100000 0x800000>; - logo_addr = "0x7f800000"; - mem_alloc = <0>; - pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ -}; - -&pwm_AO_cd { - status = "okay"; -}; - -&saradc { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <300000>; - pinctrl-names="default"; - pinctrl-0=<&i2c1_h_pins>; - - lcd_extern_i2c0: lcd_extern_i2c@0 { - compatible = "lcd_ext, i2c"; - dev_name = "i2c_T5800Q"; - reg = <0x1c>; - status = "okay"; - }; - - lcd_extern_i2c1: lcd_extern_i2c@1 { - compatible = "lcd_ext, i2c"; - dev_name = "i2c_ANX6862"; - reg = <0x20>; - status = "okay"; - }; - - lcd_extern_i2c2: lcd_extern_i2c@2 { - compatible = "lcd_ext, i2c"; - dev_name = "i2c_ANX7911"; - reg = <0x74>; - status = "okay"; - }; -}; - -&pwm_ab { - status = "okay"; -}; - -&efuse { - status = "okay"; -};