From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sat, 8 Feb 2020 22:04:19 +0000 (-0800)
Subject: Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
X-Git-Tag: v5.15~4504
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=eab3540562fb44f830e09492374fcc69a283ce47;p=platform%2Fkernel%2Flinux-starfive.git

Merge tag 'armsoc-drivers' of git://git./linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - Nvidia: Fuse support for Tegra194, continued memory controller
     pieces for Tegra30

   - NXP/FSL: Refactorings of QuickEngine drivers to support
     ARM/ARM64/PPC

   - NXP/FSL: i.MX8MP SoC driver pieces

   - TI Keystone: ring accelerator driver

   - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

   - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
     communication for power management

   - Overall support patch set for cpuidle on more complex hierarchies
     (PSCI-based)

  and misc cleanups, refactorings of Marvell, TI, other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
  drivers: soc: xilinx: Use mailbox IPI callback
  dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
  drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
  MAINTAINERS: Add brcmstb PCIe controller entry
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  soc/tegra: regulators: Do nothing if voltage is unchanged
  memory: tegra: Correct reset value of xusb_hostr
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  bus: tegra-aconnect: Remove PM_CLK dependency
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  ...
---

eab3540562fb44f830e09492374fcc69a283ce47
diff --cc drivers/soc/tegra/fuse/tegra-apbmisc.c
index a2fd6ccd48f9,4a737f15e401..089d9340564b
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@@ -159,13 -157,21 +157,21 @@@ void __init tegra_init_apbmisc(void
  		}
  	}
  
 -	apbmisc_base = ioremap_nocache(apbmisc.start, resource_size(&apbmisc));
 +	apbmisc_base = ioremap(apbmisc.start, resource_size(&apbmisc));
- 	if (!apbmisc_base)
+ 	if (!apbmisc_base) {
  		pr_err("failed to map APBMISC registers\n");
+ 	} else {
+ 		chipid = readl_relaxed(apbmisc_base + 4);
+ 		iounmap(apbmisc_base);
+ 	}
  
 -	strapping_base = ioremap_nocache(straps.start, resource_size(&straps));
 +	strapping_base = ioremap(straps.start, resource_size(&straps));
- 	if (!strapping_base)
+ 	if (!strapping_base) {
  		pr_err("failed to map strapping options registers\n");
+ 	} else {
+ 		strapping = readl_relaxed(strapping_base);
+ 		iounmap(strapping_base);
+ 	}
  
  	long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code");
  }