From: Boris Brezillon Date: Thu, 5 Mar 2020 10:52:12 +0000 (+0100) Subject: panfrost: Add an helper to update the rasterizer part of a tiler job desc X-Git-Tag: upstream/20.1.8~2607 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e94076f8f59c25ba1ccb5e3409b9587a9d0845e8;p=platform%2Fupstream%2Fmesa.git panfrost: Add an helper to update the rasterizer part of a tiler job desc That's part of our attempt to make panfrost_emit_for_draw() a bit more dry and eventually get rid of it by inlining the code in panfrost_draw_vbo(). This is just one step in this direction. Note that we get rid of the panfrost_rasterizer.tiler_gl_enables field along the way, as setting/clearing those bits at draw time instead of doing when the state is created should make a huge difference. We might get back to pre-computed VT descs at some point, but let's keep things simple for now. Signed-off-by: Boris Brezillon Reviewed-by: Alyssa Rosenzweig Part-of: --- diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c index d1f8c75..b6b569c 100644 --- a/src/gallium/drivers/panfrost/pan_cmdstream.c +++ b/src/gallium/drivers/panfrost/pan_cmdstream.c @@ -60,6 +60,35 @@ panfrost_vt_attach_framebuffer(struct panfrost_context *ctx, } void +panfrost_vt_update_rasterizer(struct panfrost_context *ctx, + struct midgard_payload_vertex_tiler *tp) +{ + struct panfrost_rasterizer *rasterizer = ctx->rasterizer; + + tp->gl_enables |= 0x7; + SET_BIT(tp->gl_enables, MALI_FRONT_CCW_TOP, + rasterizer && rasterizer->base.front_ccw); + SET_BIT(tp->gl_enables, MALI_CULL_FACE_FRONT, + rasterizer && (rasterizer->base.cull_face & PIPE_FACE_FRONT)); + SET_BIT(tp->gl_enables, MALI_CULL_FACE_BACK, + rasterizer && (rasterizer->base.cull_face & PIPE_FACE_BACK)); + SET_BIT(tp->prefix.unknown_draw, MALI_DRAW_FLATSHADE_FIRST, + rasterizer && rasterizer->base.flatshade_first); + + if (!panfrost_writes_point_size(ctx)) { + bool points = tp->prefix.draw_mode == MALI_POINTS; + float val = 0.0f; + + if (rasterizer) + val = points ? + rasterizer->base.point_size : + rasterizer->base.line_width; + + tp->primitive_size.constant = val; + } +} + +void panfrost_vt_update_occlusion_query(struct panfrost_context *ctx, struct midgard_payload_vertex_tiler *tp) { diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.h b/src/gallium/drivers/panfrost/pan_cmdstream.h index 92544d2..2fa088b 100644 --- a/src/gallium/drivers/panfrost/pan_cmdstream.h +++ b/src/gallium/drivers/panfrost/pan_cmdstream.h @@ -37,6 +37,10 @@ panfrost_vt_attach_framebuffer(struct panfrost_context *ctx, struct midgard_payload_vertex_tiler *vt); void +panfrost_vt_update_rasterizer(struct panfrost_context *ctx, + struct midgard_payload_vertex_tiler *tp); + +void panfrost_vt_update_occlusion_query(struct panfrost_context *ctx, struct midgard_payload_vertex_tiler *tp); diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c index d2cb940..5904645 100644 --- a/src/gallium/drivers/panfrost/pan_context.c +++ b/src/gallium/drivers/panfrost/pan_context.c @@ -544,7 +544,6 @@ panfrost_emit_for_draw(struct panfrost_context *ctx) if (ctx->rasterizer) { bool msaa = ctx->rasterizer->base.multisample; - ctx->payloads[PIPE_SHADER_FRAGMENT].gl_enables = ctx->rasterizer->tiler_gl_enables; /* TODO: Sample size */ SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_HAS_MSAA, msaa); @@ -553,27 +552,13 @@ panfrost_emit_for_draw(struct panfrost_context *ctx) panfrost_batch_set_requirements(batch); + panfrost_vt_update_rasterizer(ctx, &ctx->payloads[PIPE_SHADER_FRAGMENT]); panfrost_vt_update_occlusion_query(ctx, &ctx->payloads[PIPE_SHADER_FRAGMENT]); panfrost_patch_shader_state(ctx, PIPE_SHADER_VERTEX); panfrost_emit_shader_meta(batch, PIPE_SHADER_VERTEX, &ctx->payloads[PIPE_SHADER_VERTEX]); - if (ctx->shader[PIPE_SHADER_VERTEX] && ctx->shader[PIPE_SHADER_FRAGMENT]) { - /* Check if we need to link the gl_PointSize varying */ - if (!panfrost_writes_point_size(ctx)) { - /* If the size is constant, write it out. Otherwise, - * don't touch primitive_size (since we would clobber - * the pointer there) */ - - bool points = ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.draw_mode == MALI_POINTS; - - ctx->payloads[PIPE_SHADER_FRAGMENT].primitive_size.constant = points ? - ctx->rasterizer->base.point_size : - ctx->rasterizer->base.line_width; - } - } - if (ctx->shader[PIPE_SHADER_FRAGMENT]) { struct panfrost_shader_state *variant = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT); @@ -1110,18 +1095,6 @@ panfrost_create_rasterizer_state( so->base = *cso; - /* Bitmask, unknown meaning of the start value. 0x105 on 32-bit T6XX */ - so->tiler_gl_enables = 0x7; - - if (cso->front_ccw) - so->tiler_gl_enables |= MALI_FRONT_CCW_TOP; - - if (cso->cull_face & PIPE_FACE_FRONT) - so->tiler_gl_enables |= MALI_CULL_FACE_FRONT; - - if (cso->cull_face & PIPE_FACE_BACK) - so->tiler_gl_enables |= MALI_CULL_FACE_BACK; - return so; } diff --git a/src/gallium/drivers/panfrost/pan_context.h b/src/gallium/drivers/panfrost/pan_context.h index 768e1cd..b6eb720 100644 --- a/src/gallium/drivers/panfrost/pan_context.h +++ b/src/gallium/drivers/panfrost/pan_context.h @@ -178,9 +178,6 @@ struct panfrost_context { struct panfrost_rasterizer { struct pipe_rasterizer_state base; - - /* Bitmask of front face, etc */ - unsigned tiler_gl_enables; }; /* Variants bundle together to form the backing CSO, bundling multiple