From: Minkyu Kang Date: Thu, 18 Feb 2010 02:32:02 +0000 (+0900) Subject: s5pc1xx: gpio: use upper case macro X-Git-Tag: JB12_20100218~9^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e8d6d30e841ccf05bf53de59e257ce4e67960663;p=kernel%2Fu-boot.git s5pc1xx: gpio: use upper case macro Signed-off-by: Minkyu Kang --- diff --git a/board/samsung/p1p2/p1p2.c b/board/samsung/p1p2/p1p2.c index 51e00d7..d595f4a 100644 --- a/board/samsung/p1p2/p1p2.c +++ b/board/samsung/p1p2/p1p2.c @@ -1546,11 +1546,11 @@ void lcd_cfg_gpio(void) gpio_set_pull(&gpio_base->gpio_f2, i, GPIO_PULL_NONE); /* drive strength to max (24bit) */ - gpio_set_drv(&gpio_base->gpio_f0, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f0, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f0, i, GPIO_DRV_SLOW); - gpio_set_drv(&gpio_base->gpio_f1, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f1, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f1, i, GPIO_DRV_SLOW); - gpio_set_drv(&gpio_base->gpio_f2, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f2, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f2, i, GPIO_DRV_SLOW); } @@ -1564,7 +1564,7 @@ void lcd_cfg_gpio(void) /* pull-up/down disable */ gpio_set_pull(&gpio_base->gpio_f3, i, GPIO_PULL_NONE); /* drive strength to max (24bit) */ - gpio_set_drv(&gpio_base->gpio_f3, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f3, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f3, i, GPIO_DRV_SLOW); } /* display output path selection (only [1:0] valid) */ @@ -2176,7 +2176,7 @@ int board_mmc_init(bd_t *bis) /* GPG0[0:6] pull disable */ gpio_set_pull(&s5pc110_gpio->gpio_g0, i, GPIO_PULL_NONE); /* GPG0[0:6] drv 4x */ - gpio_set_drv(&s5pc110_gpio->gpio_g0, i, GPIO_DRV_4x); + gpio_set_drv(&s5pc110_gpio->gpio_g0, i, GPIO_DRV_4X); } return s5pc1xx_mmc_init(0); diff --git a/board/samsung/universal/universal.c b/board/samsung/universal/universal.c index 3c27232..233ae97 100644 --- a/board/samsung/universal/universal.c +++ b/board/samsung/universal/universal.c @@ -1420,11 +1420,11 @@ void lcd_cfg_gpio(void) gpio_set_pull(&gpio_base->gpio_f2, i, GPIO_PULL_NONE); /* drive strength to max (24bit) */ - gpio_set_drv(&gpio_base->gpio_f0, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f0, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f0, i, GPIO_DRV_SLOW); - gpio_set_drv(&gpio_base->gpio_f1, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f1, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f1, i, GPIO_DRV_SLOW); - gpio_set_drv(&gpio_base->gpio_f2, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f2, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f2, i, GPIO_DRV_SLOW); } @@ -1438,7 +1438,7 @@ void lcd_cfg_gpio(void) /* pull-up/down disable */ gpio_set_pull(&gpio_base->gpio_f3, i, GPIO_PULL_NONE); /* drive strength to max (24bit) */ - gpio_set_drv(&gpio_base->gpio_f3, i, GPIO_DRV_4x); + gpio_set_drv(&gpio_base->gpio_f3, i, GPIO_DRV_4X); gpio_set_rate(&gpio_base->gpio_f3, i, GPIO_DRV_SLOW); } /* display output path selection (only [1:0] valid) */ @@ -2150,7 +2150,7 @@ int board_mmc_init(bd_t *bis) /* GPG0[0:6] pull disable */ gpio_set_pull(&s5pc110_gpio->gpio_g0, i, GPIO_PULL_NONE); /* GPG0[0:6] drv 4x */ - gpio_set_drv(&s5pc110_gpio->gpio_g0, i, GPIO_DRV_4x); + gpio_set_drv(&s5pc110_gpio->gpio_g0, i, GPIO_DRV_4X); } return s5pc1xx_mmc_init(0); diff --git a/cpu/arm_cortexa8/s5pc1xx/gpio.c b/cpu/arm_cortexa8/s5pc1xx/gpio.c index 833a06b..aba801d 100644 --- a/cpu/arm_cortexa8/s5pc1xx/gpio.c +++ b/cpu/arm_cortexa8/s5pc1xx/gpio.c @@ -48,7 +48,7 @@ void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg) value = readl(&bank->con); } -void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int enable) +void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en) { unsigned int value; @@ -56,7 +56,7 @@ void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int enable) value = readl(&bank->dat); value &= ~DAT_MASK(gpio); - if (enable) + if (en) value |= DAT_SET(gpio); writel(value, &bank->dat); if (s5pc1xx_get_cpu_rev() == 0) @@ -68,13 +68,13 @@ void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio) gpio_cfg_pin(bank, gpio, GPIO_INPUT); } -void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int enable) +void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en) { unsigned int value; value = readl(&bank->dat); value &= ~DAT_MASK(gpio); - if (enable) + if (en) value |= DAT_SET(gpio); writel(value, &bank->dat); if (s5pc1xx_get_cpu_rev() == 0) @@ -118,14 +118,14 @@ void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) value &= ~DRV_MASK(gpio); switch (mode) { - case GPIO_DRV_1x: - case GPIO_DRV_2x: - case GPIO_DRV_3x: - case GPIO_DRV_4x: + case GPIO_DRV_1X: + case GPIO_DRV_2X: + case GPIO_DRV_3X: + case GPIO_DRV_4X: value |= DRV_SET(gpio, mode); break; default: - break; + return; } writel(value, &bank->drv); @@ -146,7 +146,7 @@ void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) value |= RATE_SET(gpio); break; default: - break; + return; } writel(value, &bank->drv); diff --git a/include/asm-arm/arch-s5pc1xx/gpio.h b/include/asm-arm/arch-s5pc1xx/gpio.h index ea7311f..8e4bb86 100644 --- a/include/asm-arm/arch-s5pc1xx/gpio.h +++ b/include/asm-arm/arch-s5pc1xx/gpio.h @@ -127,9 +127,9 @@ struct s5pc110_gpio { /* functions */ void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg); -void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int enable); +void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en); void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio); -void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int enable); +void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en); unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio); void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); @@ -148,10 +148,10 @@ void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); #define GPIO_PULL_UP 0x2 /* Drive Strength level */ -#define GPIO_DRV_1x 0x0 -#define GPIO_DRV_2x 0x1 -#define GPIO_DRV_3x 0x2 -#define GPIO_DRV_4x 0x3 +#define GPIO_DRV_1X 0x0 +#define GPIO_DRV_2X 0x1 +#define GPIO_DRV_3X 0x2 +#define GPIO_DRV_4X 0x3 #define GPIO_DRV_FAST 0x0 #define GPIO_DRV_SLOW 0x1