From: Brad Volkin Date: Wed, 29 Jan 2014 21:58:25 +0000 (-0800) Subject: tests: Add a test for the command parser X-Git-Tag: intel-gpu-tools-1.7~210 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e8b4ecd387ec12fb6ef28fd64307688f70ea1d92;p=profile%2Fextras%2Fintel-gpu-tools.git tests: Add a test for the command parser Start with a simple testcase that should pass. v2: Switch to I915_PARAM_CMD_PARSER_VERSION Signed-off-by: Brad Volkin Signed-off-by: Daniel Vetter --- diff --git a/tests/.gitignore b/tests/.gitignore index 60aa3b4..8b94613 100644 --- a/tests/.gitignore +++ b/tests/.gitignore @@ -35,6 +35,7 @@ gem_exec_blt gem_exec_faulting_reloc gem_exec_lut_handle gem_exec_nop +gem_exec_parse gem_fd_exhaustion gem_fenced_exec_thrash gem_fence_thrash diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 8aeaac0..bf02a48 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -29,6 +29,7 @@ TESTS_progs_M = \ gem_exec_bad_domains \ gem_exec_faulting_reloc \ gem_exec_nop \ + gem_exec_parse \ gem_fenced_exec_thrash \ gem_fence_thrash \ gem_flink \ diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c new file mode 100644 index 0000000..c71e478 --- /dev/null +++ b/tests/gem_exec_parse.c @@ -0,0 +1,140 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" + +#ifndef I915_PARAM_CMD_PARSER_VERSION +#define I915_PARAM_CMD_PARSER_VERSION 28 +#endif + +static int exec_batch_patched(int fd, uint32_t cmd_bo, uint32_t *cmds, + int size, int patch_offset, uint64_t expected_value) +{ + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 objs[2]; + struct drm_i915_gem_relocation_entry reloc[1]; + + uint32_t target_bo = gem_create(fd, 4096); + uint64_t actual_value = 0; + + gem_write(fd, cmd_bo, 0, cmds, size); + + reloc[0].offset = patch_offset; + reloc[0].delta = 0; + reloc[0].target_handle = target_bo; + reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; + reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; + reloc[0].presumed_offset = 0; + + objs[0].handle = target_bo; + objs[0].relocation_count = 0; + objs[0].relocs_ptr = 0; + objs[0].alignment = 0; + objs[0].offset = 0; + objs[0].flags = 0; + objs[0].rsvd1 = 0; + objs[0].rsvd2 = 0; + + objs[1].handle = cmd_bo; + objs[1].relocation_count = 1; + objs[1].relocs_ptr = (uintptr_t)reloc; + objs[1].alignment = 0; + objs[1].offset = 0; + objs[1].flags = 0; + objs[1].rsvd1 = 0; + objs[1].rsvd2 = 0; + + execbuf.buffers_ptr = (uintptr_t)objs; + execbuf.buffer_count = 2; + execbuf.batch_start_offset = 0; + execbuf.batch_len = size; + execbuf.cliprects_ptr = 0; + execbuf.num_cliprects = 0; + execbuf.DR1 = 0; + execbuf.DR4 = 0; + execbuf.flags = I915_EXEC_RENDER; + i915_execbuffer2_set_context_id(execbuf, 0); + execbuf.rsvd2 = 0; + + gem_execbuf(fd, &execbuf); + gem_sync(fd, cmd_bo); + + gem_read(fd,target_bo, 0, &actual_value, sizeof(actual_value)); + igt_assert(expected_value == actual_value); + + gem_close(fd, target_bo); + + return 1; +} + +uint32_t handle; +int fd; + +#define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2) +#define PIPE_CONTROL_QW_WRITE (1<<14) + +igt_main +{ + igt_fixture { + int parser_version = 0; + drm_i915_getparam_t gp; + int rc; + + fd = drm_open_any(); + + gp.param = I915_PARAM_CMD_PARSER_VERSION; + gp.value = &parser_version; + rc = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); + igt_require(!rc && parser_version > 0); + + handle = gem_create(fd, 4096); + } + + igt_subtest("basic-allowed") { + uint32_t pc[] = { + GFX_OP_PIPE_CONTROL, + PIPE_CONTROL_QW_WRITE, + 0, // To be patched + 0x12000000, + 0, + MI_BATCH_BUFFER_END, + }; + igt_assert( + exec_batch_patched(fd, handle, + pc, sizeof(pc), + 8, // patch offset, + 0x12000000)); + } + + igt_fixture { + gem_close(fd, handle); + + close(fd); + } +}