From: Krzysztof Parzyszek Date: Tue, 4 May 2021 14:26:31 +0000 (-0500) Subject: [Hexagon] Improve argument packing in vector shuffle selection X-Git-Tag: llvmorg-14-init~5666 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e7c839b1925f27cacc89ab9b22abfc7da8fbfb15;p=platform%2Fupstream%2Fllvm.git [Hexagon] Improve argument packing in vector shuffle selection --- diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp index 29e76b5..898b8c8 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp @@ -820,15 +820,22 @@ namespace llvm { HST(getHexagonSubtarget(G)), HwLen(HST.getVectorLength()) {} MVT getSingleVT(MVT ElemTy) const { + assert(ElemTy != MVT::i1 && "Use getBoolVT for predicates"); unsigned NumElems = HwLen / (ElemTy.getSizeInBits()/8); return MVT::getVectorVT(ElemTy, NumElems); } MVT getPairVT(MVT ElemTy) const { + assert(ElemTy != MVT::i1); // Suspicious: there are no predicate pairs. unsigned NumElems = (2*HwLen) / (ElemTy.getSizeInBits()/8); return MVT::getVectorVT(ElemTy, NumElems); } + MVT getBoolVT() const { + // Return HwLen x i1. + return MVT::getVectorVT(MVT::i1, HwLen); + } + void selectShuffle(SDNode *N); void selectRor(SDNode *N); void selectVAlign(SDNode *N); @@ -837,17 +844,18 @@ namespace llvm { void select(SDNode *ISelN); void materialize(const ResultStack &Results); + SDValue getConst32(int Val, const SDLoc &dl); SDValue getVectorConstant(ArrayRef Data, const SDLoc &dl); enum : unsigned { None, PackMux, }; - OpRef concat(OpRef Va, OpRef Vb, ResultStack &Results); - OpRef packs(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results, - MutableArrayRef NewMask, unsigned Options = None); - OpRef packp(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results, - MutableArrayRef NewMask); + OpRef concats(OpRef Va, OpRef Vb, ResultStack &Results); + OpRef packss(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results, + MutableArrayRef NewMask, unsigned Options = None); + OpRef packpp(ShuffleMask SM, OpRef Va, OpRef Vb, ResultStack &Results, + MutableArrayRef NewMask); OpRef vmuxs(ArrayRef Bytes, OpRef Va, OpRef Vb, ResultStack &Results); OpRef vmuxp(ArrayRef Bytes, OpRef Va, OpRef Vb, @@ -917,6 +925,85 @@ static bool isIdentity(ArrayRef Mask) { return true; } +static SmallVector getInputSegmentList(ShuffleMask SM, + unsigned SegLen) { + assert(isPowerOf2_32(SegLen)); + SmallVector SegList; + if (SM.MaxSrc == -1) + return SegList; + + unsigned Shift = Log2_32(SegLen); + BitVector Segs(alignTo(SM.MaxSrc + 1, SegLen) >> Shift); + + for (int I = 0, E = SM.Mask.size(); I != E; ++I) { + int M = SM.Mask[I]; + if (M >= 0) + Segs.set(M >> Shift); + } + + for (unsigned B : Segs.set_bits()) + SegList.push_back(B); + return SegList; +} + +static SmallVector getOutputSegmentMap(ShuffleMask SM, + unsigned SegLen) { + // Calculate the layout of the output segments in terms of the input + // segments. + // For example [1,3,1,0] means that the output consists of 4 output + // segments, where the first output segment has only elements of the + // input segment at index 1. The next output segment only has elements + // of the input segment 3, etc. + // If an output segment only has undef elements, the value will be ~0u. + // If an output segment has elements from more than one input segment, + // the corresponding value will be ~1u. + unsigned MaskLen = SM.Mask.size(); + assert(MaskLen % SegLen == 0); + SmallVector Map(MaskLen / SegLen); + + for (int S = 0, E = Map.size(); S != E; ++S) { + unsigned Idx = ~0u; + for (int I = 0; I != static_cast(SegLen); ++I) { + int M = SM.Mask[S*SegLen + I]; + if (M < 0) + continue; + unsigned G = M / SegLen; // Input segment of this element. + if (Idx == ~0u) { + Idx = G; + } else if (Idx != G) { + Idx = ~1u; + break; + } + } + Map[S] = Idx; + } + + return Map; +} + +static void packSegmentMask(ArrayRef Mask, ArrayRef OutSegMap, + unsigned SegLen, MutableArrayRef PackedMask) { + SmallVector InvMap; + for (int I = OutSegMap.size() - 1; I >= 0; --I) { + unsigned S = OutSegMap[I]; + assert(S != ~0u && "Unexpected undef"); + assert(S != ~1u && "Unexpected multi"); + if (InvMap.size() <= S) + InvMap.resize(S+1); + InvMap[S] = I; + } + + unsigned Shift = Log2_32(SegLen); + for (int I = 0, E = Mask.size(); I != E; ++I) { + int M = Mask[I]; + if (M >= 0) { + int OutIdx = InvMap[M >> Shift]; + M = (M & (SegLen-1)) + SegLen*OutIdx; + } + PackedMask[I] = M; + } +} + static bool isPermutation(ArrayRef Mask) { // Check by adding all numbers only works if there is no overflow. assert(Mask.size() < 0x00007FFF && "Sanity failure"); @@ -1017,99 +1104,177 @@ void HvxSelector::materialize(const ResultStack &Results) { DAG.RemoveDeadNodes(); } -OpRef HvxSelector::concat(OpRef Lo, OpRef Hi, ResultStack &Results) { +OpRef HvxSelector::concats(OpRef Lo, OpRef Hi, ResultStack &Results) { DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); const SDLoc &dl(Results.InpNode); Results.push(TargetOpcode::REG_SEQUENCE, getPairVT(MVT::i8), { - DAG.getTargetConstant(Hexagon::HvxWRRegClassID, dl, MVT::i32), - Lo, DAG.getTargetConstant(Hexagon::vsub_lo, dl, MVT::i32), - Hi, DAG.getTargetConstant(Hexagon::vsub_hi, dl, MVT::i32), + getConst32(Hexagon::HvxWRRegClassID, dl), + Lo, getConst32(Hexagon::vsub_lo, dl), + Hi, getConst32(Hexagon::vsub_hi, dl), }); return OpRef::res(Results.top()); } -// Va, Vb are single vectors, SM can be arbitrarily long. -OpRef HvxSelector::packs(ShuffleMask SM, OpRef Va, OpRef Vb, - ResultStack &Results, MutableArrayRef NewMask, - unsigned Options) { +// Va, Vb are single vectors, SM is a single vector. +OpRef HvxSelector::packss(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results, MutableArrayRef NewMask, + unsigned Options) { DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); if (!Va.isValid() || !Vb.isValid()) return OpRef::fail(); - int VecLen = SM.Mask.size(); MVT Ty = getSingleVT(MVT::i8); + MVT PairTy = getPairVT(MVT::i8); + OpRef Inp[2] = {Va, Vb}; - auto IsExtSubvector = [] (ShuffleMask M) { - assert(M.MinSrc >= 0 && M.MaxSrc >= 0); - for (int I = 0, E = M.Mask.size(); I != E; ++I) { - if (M.Mask[I] >= 0 && M.Mask[I]-I != M.MinSrc) - return false; + auto valign = [this](OpRef Lo, OpRef Hi, unsigned Amt, MVT Ty, + ResultStack &Results) { + if (Amt == 0) + return Lo; + const SDLoc &dl(Results.InpNode); + if (isUInt<3>(Amt) || isUInt<3>(HwLen - Amt)) { + bool IsRight = isUInt<3>(Amt); // Right align. + SDValue S = getConst32(IsRight ? Amt : HwLen - Amt, dl); + unsigned Opc = IsRight ? Hexagon::V6_valignbi : Hexagon::V6_vlalignbi; + Results.push(Opc, Ty, {Hi, Lo, S}); + return OpRef::res(Results.top()); } - return true; + Results.push(Hexagon::A2_tfrsi, MVT::i32, {getConst32(Amt, dl)}); + OpRef A = OpRef::res(Results.top()); + Results.push(Hexagon::V6_valignb, Ty, {Hi, Lo, A}); + return OpRef::res(Results.top()); }; - if (SM.MaxSrc - SM.MinSrc < int(HwLen)) { - if (SM.MinSrc == 0 || SM.MinSrc == int(HwLen) || !IsExtSubvector(SM)) { - // If the mask picks elements from only one of the operands, return - // that operand, and update the mask to use index 0 to refer to the - // first element of that operand. - // If the mask extracts a subvector, it will be handled below, so - // skip it here. - if (SM.MaxSrc < int(HwLen)) { - memcpy(NewMask.data(), SM.Mask.data(), sizeof(int)*VecLen); - return Va; + // Check if we can shuffle vector halves around to get the used elements + // into a single vector. + SmallVector MaskH(SM.Mask.begin(), SM.Mask.end()); + SmallVector SegList = getInputSegmentList(SM.Mask, HwLen/2); + unsigned SegCount = SegList.size(); + + if (SegList.empty()) + return OpRef::undef(Ty); + + if (SegCount == 1) { + unsigned SrcOp = SegList[0] / 2; + for (int I = 0, E = SM.Mask.size(); I != E; ++I) { + int M = SM.Mask[I]; + if (M >= 0) { + M -= SrcOp * HwLen; + assert(M >= 0); } - if (SM.MinSrc >= int(HwLen)) { - for (int I = 0; I != VecLen; ++I) { - int M = SM.Mask[I]; - if (M != -1) - M -= HwLen; - NewMask[I] = M; + NewMask[I] = M; + } + return Inp[SrcOp]; + } + + if (SegCount == 2) { + SmallVector SegMap = getOutputSegmentMap(SM.Mask, HwLen/2); + unsigned Seg0 = SegMap[0], Seg1 = SegMap[1]; + + // Both output segments shouldn't be undef here: this would imply + // empty SegList, which was checked above. + assert(Seg0 != ~0u || Seg1 != ~0u); + + if (Seg0 != ~1u && Seg1 != ~1u) { + const SDLoc &dl(Results.InpNode); + Results.push(Hexagon::A2_tfrsi, MVT::i32, {getConst32(HwLen/2, dl)}); + OpRef HL = OpRef::res(Results.top()); + + // Va = AB, Vb = CD + + if (Seg0 / 2 == Seg1 / 2) { + // Same input vector. + Va = Inp[Seg0 / 2]; + if (Seg0 > Seg1) { + // Swap halves. + Results.push(Hexagon::V6_vror, Ty, {Inp[Seg0 / 2], HL}); + Va = OpRef::res(Results.top()); + } + packSegmentMask(SM.Mask, SegMap, HwLen/2, MaskH); + } else if (Seg0 % 2 == Seg1 % 2) { + // Picking AC, BD, CA, or DB. + // vshuff(CD,AB,HL) -> BD:AC + // vshuff(AB,CD,HL) -> DB:CA + auto Vs = (Seg0 == 0 || Seg0 == 1) ? std::make_pair(Vb, Va) // AC or BD + : std::make_pair(Va, Vb); // CA or DB + Results.push(Hexagon::V6_vshuffvdd, PairTy, {Vs.first, Vs.second, HL}); + OpRef P = OpRef::res(Results.top()); + Va = (Seg0 == 0 || Seg0 == 2) ? OpRef::lo(P) : OpRef::hi(P); + packSegmentMask(SM.Mask, SegMap, HwLen/2, MaskH); + } else { + // Picking AD, BC, CB, or DA. + if ((Seg0 == 0 && Seg1 == 3) || (Seg0 == 2 && Seg1 == 1)) { + // AD or BC: this can be done using vmux. + // Q = V6_pred_scalar2 HwLen/2 + // V = V6_vmux Q, (Va, Vb) or (Vb, Va) + Results.push(Hexagon::V6_pred_scalar2, getBoolVT(), {HL}); + OpRef Qt = OpRef::res(Results.top()); + auto Vs = (Seg0 == 0) ? std::make_pair(Va, Vb) // AD + : std::make_pair(Vb, Va); // CB + Results.push(Hexagon::V6_vmux, Ty, {Qt, Vs.first, Vs.second}); + Va = OpRef::res(Results.top()); + packSegmentMask(SM.Mask, SegMap, HwLen/2, MaskH); + } else { + // BC or DA: this could be done via valign by HwLen/2. + // Do nothing here, because valign (if possible) will be generated + // later on (make sure the Seg0 values are as expected, for sanity). + assert(Seg0 == 1 || Seg0 == 3); } - return Vb; } } - int MinSrc = SM.MinSrc; - if (SM.MaxSrc < int(HwLen)) { - Vb = Va; - } else if (SM.MinSrc > int(HwLen)) { - Va = Vb; - MinSrc = SM.MinSrc - HwLen; + } + + // Check if the arguments can be packed by valign(Va,Vb) or valign(Vb,Va). + + ShuffleMask SMH(MaskH); + SmallVector MaskA(SMH.Mask.begin(), SMH.Mask.end()); + + if (SMH.MaxSrc - SMH.MinSrc >= static_cast(HwLen)) { + // valign(Lo=Va,Hi=Vb) won't work. Try swapping Va/Vb. + SmallVector Swapped(SMH.Mask.begin(), SMH.Mask.end()); + ShuffleVectorSDNode::commuteMask(Swapped); + ShuffleMask SW(Swapped); + if (SW.MaxSrc - SW.MinSrc < static_cast(HwLen)) { + MaskA.assign(SW.Mask.begin(), SW.Mask.end()); + std::swap(Va, Vb); } - const SDLoc &dl(Results.InpNode); - if (isUInt<3>(MinSrc) || isUInt<3>(HwLen-MinSrc)) { - bool IsRight = isUInt<3>(MinSrc); // Right align. - SDValue S = DAG.getTargetConstant(IsRight ? MinSrc : HwLen-MinSrc, - dl, MVT::i32); - unsigned Opc = IsRight ? Hexagon::V6_valignbi - : Hexagon::V6_vlalignbi; - Results.push(Opc, Ty, {Vb, Va, S}); - } else { - SDValue S = DAG.getTargetConstant(MinSrc, dl, MVT::i32); - Results.push(Hexagon::A2_tfrsi, MVT::i32, {S}); - unsigned Top = Results.top(); - Results.push(Hexagon::V6_valignb, Ty, {Vb, Va, OpRef::res(Top)}); + } + ShuffleMask SMA(MaskA); + + if (SMA.MaxSrc - SMA.MinSrc < static_cast(HwLen)) { + int ShiftR = SMA.MinSrc; + if (ShiftR >= static_cast(HwLen)) { + Va = Vb; + Vb = OpRef::undef(Ty); + ShiftR -= HwLen; } - for (int I = 0; I != VecLen; ++I) { - int M = SM.Mask[I]; + OpRef RetVal = valign(Va, Vb, ShiftR, Ty, Results); + + for (int I = 0, E = SMA.Mask.size(); I != E; ++I) { + int M = SMA.Mask[I]; if (M != -1) - M -= SM.MinSrc; + M -= SMA.MinSrc; NewMask[I] = M; } - return OpRef::res(Results.top()); + return RetVal; } + // By here, packing by segment (half-vector) shuffling, and vector alignment + // failed. Try vmux. + // Note: since this is using the original mask, Va and Vb must not have been + // modified. + if (Options & PackMux) { // If elements picked from Va and Vb have all different (source) indexes // (relative to the start of the argument), do a mux, and update the mask. BitVector Picked(HwLen); SmallVector MuxBytes(HwLen); bool CanMux = true; - for (int I = 0; I != VecLen; ++I) { + for (int I = 0, E = SM.Mask.size(); I != E; ++I) { int M = SM.Mask[I]; if (M == -1) continue; - if (M >= int(HwLen)) + if (M >= static_cast(HwLen)) M -= HwLen; else MuxBytes[M] = 0xFF; @@ -1122,27 +1287,21 @@ OpRef HvxSelector::packs(ShuffleMask SM, OpRef Va, OpRef Vb, if (CanMux) return vmuxs(MuxBytes, Va, Vb, Results); } - return OpRef::fail(); } -OpRef HvxSelector::packp(ShuffleMask SM, OpRef Va, OpRef Vb, - ResultStack &Results, MutableArrayRef NewMask) { +// Va, Vb are vector pairs, SM is a vector pair. +OpRef HvxSelector::packpp(ShuffleMask SM, OpRef Va, OpRef Vb, + ResultStack &Results, MutableArrayRef NewMask) { DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); - unsigned HalfMask = 0; - unsigned LogHw = Log2_32(HwLen); - for (int M : SM.Mask) { - if (M == -1) - continue; - HalfMask |= (1u << (M >> LogHw)); - } - - if (HalfMask == 0) + SmallVector SegList = getInputSegmentList(SM.Mask, HwLen); + if (SegList.empty()) return OpRef::undef(getPairVT(MVT::i8)); // If more than two halves are used, bail. // TODO: be more aggressive here? - if (countPopulation(HalfMask) > 2) + unsigned SegCount = SegList.size(); + if (SegCount > 2) return OpRef::fail(); MVT HalfTy = getSingleVT(MVT::i8); @@ -1150,29 +1309,23 @@ OpRef HvxSelector::packp(ShuffleMask SM, OpRef Va, OpRef Vb, OpRef Inp[2] = { Va, Vb }; OpRef Out[2] = { OpRef::undef(HalfTy), OpRef::undef(HalfTy) }; - uint8_t HalfIdx[4] = { 0xFF, 0xFF, 0xFF, 0xFF }; - unsigned Idx = 0; - for (unsigned I = 0; I != 4; ++I) { - if ((HalfMask & (1u << I)) == 0) - continue; - assert(Idx < 2); - OpRef Op = Inp[I/2]; - Out[Idx] = (I & 1) ? OpRef::hi(Op) : OpRef::lo(Op); - HalfIdx[I] = Idx++; - } + // Really make sure we have at most 2 vectors used in the mask. + assert(SegCount <= 2); - int VecLen = SM.Mask.size(); - for (int I = 0; I != VecLen; ++I) { - int M = SM.Mask[I]; - if (M >= 0) { - uint8_t Idx = HalfIdx[M >> LogHw]; - assert(Idx == 0 || Idx == 1); - M = (M & (HwLen-1)) + HwLen*Idx; - } - NewMask[I] = M; + for (int I = 0, E = SegList.size(); I != E; ++I) { + unsigned S = SegList[I]; + OpRef Op = Inp[S / 2]; + Out[I] = (S & 1) ? OpRef::hi(Op) : OpRef::lo(Op); } - return concat(Out[0], Out[1], Results); + // NOTE: Using SegList as the packing map here (not SegMap). This works, + // because we're not concerned here about the order of the segments (i.e. + // single vectors) in the output pair. Changing the order of vectors is + // free (as opposed to changing the order of vector halves as in packss), + // and so there is no extra cost added in case the order needs to be + // changed later. + packSegmentMask(SM.Mask, SegList, HwLen, NewMask); + return concats(Out[0], Out[1], Results); } OpRef HvxSelector::vmuxs(ArrayRef Bytes, OpRef Va, OpRef Vb, @@ -1194,7 +1347,7 @@ OpRef HvxSelector::vmuxp(ArrayRef Bytes, OpRef Va, OpRef Vb, size_t S = Bytes.size() / 2; OpRef L = vmuxs(Bytes.take_front(S), OpRef::lo(Va), OpRef::lo(Vb), Results); OpRef H = vmuxs(Bytes.drop_front(S), OpRef::hi(Va), OpRef::hi(Vb), Results); - return concat(L, H, Results); + return concats(L, H, Results); } OpRef HvxSelector::shuffs1(ShuffleMask SM, OpRef Va, ResultStack &Results) { @@ -1209,6 +1362,25 @@ OpRef HvxSelector::shuffs1(ShuffleMask SM, OpRef Va, ResultStack &Results) { if (isUndef(SM.Mask)) return OpRef::undef(getSingleVT(MVT::i8)); + unsigned HalfLen = HwLen / 2; + assert(isPowerOf2_32(HalfLen)); // Sanity. + + // Handle special case where the output is the same half of the input + // repeated twice, i.e. if Va = AB, then handle the output of AA or BB. + std::pair Strip1 = findStrip(SM.Mask, 1, HalfLen); + if ((Strip1.first & ~HalfLen) == 0 && Strip1.second == HalfLen) { + std::pair Strip2 = + findStrip(SM.Mask.drop_front(HalfLen), 1, HalfLen); + if (Strip1 == Strip2) { + const SDLoc &dl(Results.InpNode); + Results.push(Hexagon::A2_tfrsi, MVT::i32, {getConst32(HalfLen, dl)}); + Results.push(Hexagon::V6_vshuffvdd, getPairVT(MVT::i8), + {Va, Va, OpRef::res(Results.top())}); + OpRef S = OpRef::res(Results.top()); + return (Strip1.first == 0) ? OpRef::lo(S) : OpRef::hi(S); + } + } + OpRef P = perfect(SM, Va, Results); if (P.isValid()) return P; @@ -1226,10 +1398,14 @@ OpRef HvxSelector::shuffs2(ShuffleMask SM, OpRef Va, OpRef Vb, return C; int VecLen = SM.Mask.size(); - SmallVector NewMask(VecLen); - OpRef P = packs(SM, Va, Vb, Results, NewMask); + SmallVector PackedMask(VecLen); + OpRef P = packss(SM, Va, Vb, Results, PackedMask); if (P.isValid()) - return shuffs1(ShuffleMask(NewMask), P, Results); + return shuffs1(ShuffleMask(PackedMask), P, Results); + + // TODO: Before we split the mask, try perfect shuffle on concatenated + // operands. This won't work now, because the perfect code does not + // tolerate undefs in the mask. SmallVector MaskL(VecLen), MaskR(VecLen); splitMask(SM.Mask, MaskL, MaskR); @@ -1249,27 +1425,12 @@ OpRef HvxSelector::shuffs2(ShuffleMask SM, OpRef Va, OpRef Vb, OpRef HvxSelector::shuffp1(ShuffleMask SM, OpRef Va, ResultStack &Results) { DEBUG_WITH_TYPE("isel", {dbgs() << __func__ << '\n';}); - int VecLen = SM.Mask.size(); if (isIdentity(SM.Mask)) return Va; if (isUndef(SM.Mask)) return OpRef::undef(getPairVT(MVT::i8)); - SmallVector PackedMask(VecLen); - OpRef P = packs(SM, OpRef::lo(Va), OpRef::hi(Va), Results, PackedMask); - if (P.isValid()) { - ShuffleMask PM(PackedMask); - OpRef E = expanding(PM, P, Results); - if (E.isValid()) - return E; - - OpRef L = shuffs1(PM.lo(), P, Results); - OpRef H = shuffs1(PM.hi(), P, Results); - if (L.isValid() && H.isValid()) - return concat(L, H, Results); - } - OpRef R = perfect(SM, Va, Results); if (R.isValid()) return R; @@ -1278,7 +1439,7 @@ OpRef HvxSelector::shuffp1(ShuffleMask SM, OpRef Va, ResultStack &Results) { OpRef L = shuffs2(SM.lo(), OpRef::lo(Va), OpRef::hi(Va), Results); OpRef H = shuffs2(SM.hi(), OpRef::lo(Va), OpRef::hi(Va), Results); if (L.isValid() && H.isValid()) - return concat(L, H, Results); + return concats(L, H, Results); return OpRef::fail(); } @@ -1291,7 +1452,7 @@ OpRef HvxSelector::shuffp2(ShuffleMask SM, OpRef Va, OpRef Vb, int VecLen = SM.Mask.size(); SmallVector PackedMask(VecLen); - OpRef P = packp(SM, Va, Vb, Results, PackedMask); + OpRef P = packpp(SM, Va, Vb, Results, PackedMask); if (P.isValid()) return shuffp1(ShuffleMask(PackedMask), P, Results); @@ -1945,9 +2106,9 @@ OpRef HvxSelector::perfect(ShuffleMask SM, OpRef Va, ResultStack &Results) { const SDLoc &dl(Results.InpNode); OpRef Arg = HavePairs ? Va - : concat(Va, OpRef::undef(SingleTy), Results); + : concats(Va, OpRef::undef(SingleTy), Results); if (InvertedPair) - Arg = concat(OpRef::hi(Arg), OpRef::lo(Arg), Results); + Arg = concats(OpRef::hi(Arg), OpRef::lo(Arg), Results); for (unsigned I = 0, E = SwapElems.size(); I != E; ) { bool IsInc = I == E-1 || SwapElems[I] < SwapElems[I+1]; @@ -1962,8 +2123,7 @@ OpRef HvxSelector::perfect(ShuffleMask SM, OpRef Va, ResultStack &Results) { ++I; NodeTemplate Res; - Results.push(Hexagon::A2_tfrsi, MVT::i32, - { DAG.getTargetConstant(S, dl, MVT::i32) }); + Results.push(Hexagon::A2_tfrsi, MVT::i32, {getConst32(S, dl)}); Res.Opc = IsInc ? Hexagon::V6_vshuffvdd : Hexagon::V6_vdealvdd; Res.Ty = PairTy; Res.Ops = { OpRef::hi(Arg), OpRef::lo(Arg), OpRef::res(-1) }; @@ -2026,6 +2186,10 @@ OpRef HvxSelector::butterfly(ShuffleMask SM, OpRef Va, ResultStack &Results) { return OpRef::fail(); } +SDValue HvxSelector::getConst32(int Val, const SDLoc &dl) { + return DAG.getTargetConstant(Val, dl, MVT::i32); +} + SDValue HvxSelector::getVectorConstant(ArrayRef Data, const SDLoc &dl) { SmallVector Elems; @@ -2126,9 +2290,8 @@ void HvxSelector::selectRor(SDNode *N) { if (S == 0) { NewN = VecV.getNode(); } else if (isUInt<3>(S)) { - SDValue C = DAG.getTargetConstant(S, dl, MVT::i32); NewN = DAG.getMachineNode(Hexagon::V6_valignbi, dl, Ty, - {VecV, VecV, C}); + {VecV, VecV, getConst32(S, dl)}); } } diff --git a/llvm/test/CodeGen/Hexagon/autohvx/align2-128b.ll b/llvm/test/CodeGen/Hexagon/autohvx/align2-128b.ll index e2f7e9c..75eea82 100644 --- a/llvm/test/CodeGen/Hexagon/autohvx/align2-128b.ll +++ b/llvm/test/CodeGen/Hexagon/autohvx/align2-128b.ll @@ -1146,7 +1146,7 @@ define <128 x i8> @test_128(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_129: -; CHECK: v0 = valign(v1,v1,#1) +; CHECK: v0 = valign(v0,v1,#1) ; CHECK: jumpr r31 define <128 x i8> @test_129(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1154,7 +1154,7 @@ define <128 x i8> @test_129(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_130: -; CHECK: v0 = valign(v1,v1,#2) +; CHECK: v0 = valign(v0,v1,#2) ; CHECK: jumpr r31 define <128 x i8> @test_130(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1162,7 +1162,7 @@ define <128 x i8> @test_130(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_131: -; CHECK: v0 = valign(v1,v1,#3) +; CHECK: v0 = valign(v0,v1,#3) ; CHECK: jumpr r31 define <128 x i8> @test_131(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1170,7 +1170,7 @@ define <128 x i8> @test_131(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_132: -; CHECK: v0 = valign(v1,v1,#4) +; CHECK: v0 = valign(v0,v1,#4) ; CHECK: jumpr r31 define <128 x i8> @test_132(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1178,7 +1178,7 @@ define <128 x i8> @test_132(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_133: -; CHECK: v0 = valign(v1,v1,#5) +; CHECK: v0 = valign(v0,v1,#5) ; CHECK: jumpr r31 define <128 x i8> @test_133(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1186,7 +1186,7 @@ define <128 x i8> @test_133(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_134: -; CHECK: v0 = valign(v1,v1,#6) +; CHECK: v0 = valign(v0,v1,#6) ; CHECK: jumpr r31 define <128 x i8> @test_134(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1194,7 +1194,7 @@ define <128 x i8> @test_134(<128 x i8> %v0, <128 x i8> %v1) #0 { } ; CHECK-LABEL: test_135: -; CHECK: v0 = valign(v1,v1,#7) +; CHECK: v0 = valign(v0,v1,#7) ; CHECK: jumpr r31 define <128 x i8> @test_135(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1203,7 +1203,7 @@ define <128 x i8> @test_135(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_136: ; CHECK: r[[REG136:[0-9]+]] = #8 -; CHECK: v0 = valign(v1,v1,r[[REG136]]) +; CHECK: v0 = valign(v0,v1,r[[REG136]]) ; CHECK: jumpr r31 define <128 x i8> @test_136(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1212,7 +1212,7 @@ define <128 x i8> @test_136(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_137: ; CHECK: r[[REG137:[0-9]+]] = #9 -; CHECK: v0 = valign(v1,v1,r[[REG137]]) +; CHECK: v0 = valign(v0,v1,r[[REG137]]) ; CHECK: jumpr r31 define <128 x i8> @test_137(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1221,7 +1221,7 @@ define <128 x i8> @test_137(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_138: ; CHECK: r[[REG138:[0-9]+]] = #10 -; CHECK: v0 = valign(v1,v1,r[[REG138]]) +; CHECK: v0 = valign(v0,v1,r[[REG138]]) ; CHECK: jumpr r31 define <128 x i8> @test_138(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1230,7 +1230,7 @@ define <128 x i8> @test_138(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_139: ; CHECK: r[[REG139:[0-9]+]] = #11 -; CHECK: v0 = valign(v1,v1,r[[REG139]]) +; CHECK: v0 = valign(v0,v1,r[[REG139]]) ; CHECK: jumpr r31 define <128 x i8> @test_139(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1239,7 +1239,7 @@ define <128 x i8> @test_139(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_140: ; CHECK: r[[REG140:[0-9]+]] = #12 -; CHECK: v0 = valign(v1,v1,r[[REG140]]) +; CHECK: v0 = valign(v0,v1,r[[REG140]]) ; CHECK: jumpr r31 define <128 x i8> @test_140(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1248,7 +1248,7 @@ define <128 x i8> @test_140(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_141: ; CHECK: r[[REG141:[0-9]+]] = #13 -; CHECK: v0 = valign(v1,v1,r[[REG141]]) +; CHECK: v0 = valign(v0,v1,r[[REG141]]) ; CHECK: jumpr r31 define <128 x i8> @test_141(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1257,7 +1257,7 @@ define <128 x i8> @test_141(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_142: ; CHECK: r[[REG142:[0-9]+]] = #14 -; CHECK: v0 = valign(v1,v1,r[[REG142]]) +; CHECK: v0 = valign(v0,v1,r[[REG142]]) ; CHECK: jumpr r31 define <128 x i8> @test_142(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1266,7 +1266,7 @@ define <128 x i8> @test_142(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_143: ; CHECK: r[[REG143:[0-9]+]] = #15 -; CHECK: v0 = valign(v1,v1,r[[REG143]]) +; CHECK: v0 = valign(v0,v1,r[[REG143]]) ; CHECK: jumpr r31 define <128 x i8> @test_143(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1275,7 +1275,7 @@ define <128 x i8> @test_143(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_144: ; CHECK: r[[REG144:[0-9]+]] = #16 -; CHECK: v0 = valign(v1,v1,r[[REG144]]) +; CHECK: v0 = valign(v0,v1,r[[REG144]]) ; CHECK: jumpr r31 define <128 x i8> @test_144(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1284,7 +1284,7 @@ define <128 x i8> @test_144(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_145: ; CHECK: r[[REG145:[0-9]+]] = #17 -; CHECK: v0 = valign(v1,v1,r[[REG145]]) +; CHECK: v0 = valign(v0,v1,r[[REG145]]) ; CHECK: jumpr r31 define <128 x i8> @test_145(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1293,7 +1293,7 @@ define <128 x i8> @test_145(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_146: ; CHECK: r[[REG146:[0-9]+]] = #18 -; CHECK: v0 = valign(v1,v1,r[[REG146]]) +; CHECK: v0 = valign(v0,v1,r[[REG146]]) ; CHECK: jumpr r31 define <128 x i8> @test_146(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1302,7 +1302,7 @@ define <128 x i8> @test_146(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_147: ; CHECK: r[[REG147:[0-9]+]] = #19 -; CHECK: v0 = valign(v1,v1,r[[REG147]]) +; CHECK: v0 = valign(v0,v1,r[[REG147]]) ; CHECK: jumpr r31 define <128 x i8> @test_147(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1311,7 +1311,7 @@ define <128 x i8> @test_147(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_148: ; CHECK: r[[REG148:[0-9]+]] = #20 -; CHECK: v0 = valign(v1,v1,r[[REG148]]) +; CHECK: v0 = valign(v0,v1,r[[REG148]]) ; CHECK: jumpr r31 define <128 x i8> @test_148(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1320,7 +1320,7 @@ define <128 x i8> @test_148(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_149: ; CHECK: r[[REG149:[0-9]+]] = #21 -; CHECK: v0 = valign(v1,v1,r[[REG149]]) +; CHECK: v0 = valign(v0,v1,r[[REG149]]) ; CHECK: jumpr r31 define <128 x i8> @test_149(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1329,7 +1329,7 @@ define <128 x i8> @test_149(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_150: ; CHECK: r[[REG150:[0-9]+]] = #22 -; CHECK: v0 = valign(v1,v1,r[[REG150]]) +; CHECK: v0 = valign(v0,v1,r[[REG150]]) ; CHECK: jumpr r31 define <128 x i8> @test_150(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1338,7 +1338,7 @@ define <128 x i8> @test_150(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_151: ; CHECK: r[[REG151:[0-9]+]] = #23 -; CHECK: v0 = valign(v1,v1,r[[REG151]]) +; CHECK: v0 = valign(v0,v1,r[[REG151]]) ; CHECK: jumpr r31 define <128 x i8> @test_151(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1347,7 +1347,7 @@ define <128 x i8> @test_151(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_152: ; CHECK: r[[REG152:[0-9]+]] = #24 -; CHECK: v0 = valign(v1,v1,r[[REG152]]) +; CHECK: v0 = valign(v0,v1,r[[REG152]]) ; CHECK: jumpr r31 define <128 x i8> @test_152(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1356,7 +1356,7 @@ define <128 x i8> @test_152(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_153: ; CHECK: r[[REG153:[0-9]+]] = #25 -; CHECK: v0 = valign(v1,v1,r[[REG153]]) +; CHECK: v0 = valign(v0,v1,r[[REG153]]) ; CHECK: jumpr r31 define <128 x i8> @test_153(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1365,7 +1365,7 @@ define <128 x i8> @test_153(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_154: ; CHECK: r[[REG154:[0-9]+]] = #26 -; CHECK: v0 = valign(v1,v1,r[[REG154]]) +; CHECK: v0 = valign(v0,v1,r[[REG154]]) ; CHECK: jumpr r31 define <128 x i8> @test_154(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1374,7 +1374,7 @@ define <128 x i8> @test_154(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_155: ; CHECK: r[[REG155:[0-9]+]] = #27 -; CHECK: v0 = valign(v1,v1,r[[REG155]]) +; CHECK: v0 = valign(v0,v1,r[[REG155]]) ; CHECK: jumpr r31 define <128 x i8> @test_155(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1383,7 +1383,7 @@ define <128 x i8> @test_155(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_156: ; CHECK: r[[REG156:[0-9]+]] = #28 -; CHECK: v0 = valign(v1,v1,r[[REG156]]) +; CHECK: v0 = valign(v0,v1,r[[REG156]]) ; CHECK: jumpr r31 define <128 x i8> @test_156(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1392,7 +1392,7 @@ define <128 x i8> @test_156(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_157: ; CHECK: r[[REG157:[0-9]+]] = #29 -; CHECK: v0 = valign(v1,v1,r[[REG157]]) +; CHECK: v0 = valign(v0,v1,r[[REG157]]) ; CHECK: jumpr r31 define <128 x i8> @test_157(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1401,7 +1401,7 @@ define <128 x i8> @test_157(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_158: ; CHECK: r[[REG158:[0-9]+]] = #30 -; CHECK: v0 = valign(v1,v1,r[[REG158]]) +; CHECK: v0 = valign(v0,v1,r[[REG158]]) ; CHECK: jumpr r31 define <128 x i8> @test_158(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1410,7 +1410,7 @@ define <128 x i8> @test_158(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_159: ; CHECK: r[[REG159:[0-9]+]] = #31 -; CHECK: v0 = valign(v1,v1,r[[REG159]]) +; CHECK: v0 = valign(v0,v1,r[[REG159]]) ; CHECK: jumpr r31 define <128 x i8> @test_159(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1419,7 +1419,7 @@ define <128 x i8> @test_159(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_160: ; CHECK: r[[REG160:[0-9]+]] = #32 -; CHECK: v0 = valign(v1,v1,r[[REG160]]) +; CHECK: v0 = valign(v0,v1,r[[REG160]]) ; CHECK: jumpr r31 define <128 x i8> @test_160(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1428,7 +1428,7 @@ define <128 x i8> @test_160(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_161: ; CHECK: r[[REG161:[0-9]+]] = #33 -; CHECK: v0 = valign(v1,v1,r[[REG161]]) +; CHECK: v0 = valign(v0,v1,r[[REG161]]) ; CHECK: jumpr r31 define <128 x i8> @test_161(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1437,7 +1437,7 @@ define <128 x i8> @test_161(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_162: ; CHECK: r[[REG162:[0-9]+]] = #34 -; CHECK: v0 = valign(v1,v1,r[[REG162]]) +; CHECK: v0 = valign(v0,v1,r[[REG162]]) ; CHECK: jumpr r31 define <128 x i8> @test_162(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1446,7 +1446,7 @@ define <128 x i8> @test_162(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_163: ; CHECK: r[[REG163:[0-9]+]] = #35 -; CHECK: v0 = valign(v1,v1,r[[REG163]]) +; CHECK: v0 = valign(v0,v1,r[[REG163]]) ; CHECK: jumpr r31 define <128 x i8> @test_163(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1455,7 +1455,7 @@ define <128 x i8> @test_163(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_164: ; CHECK: r[[REG164:[0-9]+]] = #36 -; CHECK: v0 = valign(v1,v1,r[[REG164]]) +; CHECK: v0 = valign(v0,v1,r[[REG164]]) ; CHECK: jumpr r31 define <128 x i8> @test_164(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1464,7 +1464,7 @@ define <128 x i8> @test_164(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_165: ; CHECK: r[[REG165:[0-9]+]] = #37 -; CHECK: v0 = valign(v1,v1,r[[REG165]]) +; CHECK: v0 = valign(v0,v1,r[[REG165]]) ; CHECK: jumpr r31 define <128 x i8> @test_165(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1473,7 +1473,7 @@ define <128 x i8> @test_165(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_166: ; CHECK: r[[REG166:[0-9]+]] = #38 -; CHECK: v0 = valign(v1,v1,r[[REG166]]) +; CHECK: v0 = valign(v0,v1,r[[REG166]]) ; CHECK: jumpr r31 define <128 x i8> @test_166(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1482,7 +1482,7 @@ define <128 x i8> @test_166(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_167: ; CHECK: r[[REG167:[0-9]+]] = #39 -; CHECK: v0 = valign(v1,v1,r[[REG167]]) +; CHECK: v0 = valign(v0,v1,r[[REG167]]) ; CHECK: jumpr r31 define <128 x i8> @test_167(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1491,7 +1491,7 @@ define <128 x i8> @test_167(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_168: ; CHECK: r[[REG168:[0-9]+]] = #40 -; CHECK: v0 = valign(v1,v1,r[[REG168]]) +; CHECK: v0 = valign(v0,v1,r[[REG168]]) ; CHECK: jumpr r31 define <128 x i8> @test_168(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1500,7 +1500,7 @@ define <128 x i8> @test_168(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_169: ; CHECK: r[[REG169:[0-9]+]] = #41 -; CHECK: v0 = valign(v1,v1,r[[REG169]]) +; CHECK: v0 = valign(v0,v1,r[[REG169]]) ; CHECK: jumpr r31 define <128 x i8> @test_169(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1509,7 +1509,7 @@ define <128 x i8> @test_169(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_170: ; CHECK: r[[REG170:[0-9]+]] = #42 -; CHECK: v0 = valign(v1,v1,r[[REG170]]) +; CHECK: v0 = valign(v0,v1,r[[REG170]]) ; CHECK: jumpr r31 define <128 x i8> @test_170(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1518,7 +1518,7 @@ define <128 x i8> @test_170(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_171: ; CHECK: r[[REG171:[0-9]+]] = #43 -; CHECK: v0 = valign(v1,v1,r[[REG171]]) +; CHECK: v0 = valign(v0,v1,r[[REG171]]) ; CHECK: jumpr r31 define <128 x i8> @test_171(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1527,7 +1527,7 @@ define <128 x i8> @test_171(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_172: ; CHECK: r[[REG172:[0-9]+]] = #44 -; CHECK: v0 = valign(v1,v1,r[[REG172]]) +; CHECK: v0 = valign(v0,v1,r[[REG172]]) ; CHECK: jumpr r31 define <128 x i8> @test_172(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1536,7 +1536,7 @@ define <128 x i8> @test_172(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_173: ; CHECK: r[[REG173:[0-9]+]] = #45 -; CHECK: v0 = valign(v1,v1,r[[REG173]]) +; CHECK: v0 = valign(v0,v1,r[[REG173]]) ; CHECK: jumpr r31 define <128 x i8> @test_173(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1545,7 +1545,7 @@ define <128 x i8> @test_173(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_174: ; CHECK: r[[REG174:[0-9]+]] = #46 -; CHECK: v0 = valign(v1,v1,r[[REG174]]) +; CHECK: v0 = valign(v0,v1,r[[REG174]]) ; CHECK: jumpr r31 define <128 x i8> @test_174(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1554,7 +1554,7 @@ define <128 x i8> @test_174(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_175: ; CHECK: r[[REG175:[0-9]+]] = #47 -; CHECK: v0 = valign(v1,v1,r[[REG175]]) +; CHECK: v0 = valign(v0,v1,r[[REG175]]) ; CHECK: jumpr r31 define <128 x i8> @test_175(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1563,7 +1563,7 @@ define <128 x i8> @test_175(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_176: ; CHECK: r[[REG176:[0-9]+]] = #48 -; CHECK: v0 = valign(v1,v1,r[[REG176]]) +; CHECK: v0 = valign(v0,v1,r[[REG176]]) ; CHECK: jumpr r31 define <128 x i8> @test_176(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1572,7 +1572,7 @@ define <128 x i8> @test_176(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_177: ; CHECK: r[[REG177:[0-9]+]] = #49 -; CHECK: v0 = valign(v1,v1,r[[REG177]]) +; CHECK: v0 = valign(v0,v1,r[[REG177]]) ; CHECK: jumpr r31 define <128 x i8> @test_177(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1581,7 +1581,7 @@ define <128 x i8> @test_177(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_178: ; CHECK: r[[REG178:[0-9]+]] = #50 -; CHECK: v0 = valign(v1,v1,r[[REG178]]) +; CHECK: v0 = valign(v0,v1,r[[REG178]]) ; CHECK: jumpr r31 define <128 x i8> @test_178(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1590,7 +1590,7 @@ define <128 x i8> @test_178(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_179: ; CHECK: r[[REG179:[0-9]+]] = #51 -; CHECK: v0 = valign(v1,v1,r[[REG179]]) +; CHECK: v0 = valign(v0,v1,r[[REG179]]) ; CHECK: jumpr r31 define <128 x i8> @test_179(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1599,7 +1599,7 @@ define <128 x i8> @test_179(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_180: ; CHECK: r[[REG180:[0-9]+]] = #52 -; CHECK: v0 = valign(v1,v1,r[[REG180]]) +; CHECK: v0 = valign(v0,v1,r[[REG180]]) ; CHECK: jumpr r31 define <128 x i8> @test_180(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1608,7 +1608,7 @@ define <128 x i8> @test_180(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_181: ; CHECK: r[[REG181:[0-9]+]] = #53 -; CHECK: v0 = valign(v1,v1,r[[REG181]]) +; CHECK: v0 = valign(v0,v1,r[[REG181]]) ; CHECK: jumpr r31 define <128 x i8> @test_181(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1617,7 +1617,7 @@ define <128 x i8> @test_181(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_182: ; CHECK: r[[REG182:[0-9]+]] = #54 -; CHECK: v0 = valign(v1,v1,r[[REG182]]) +; CHECK: v0 = valign(v0,v1,r[[REG182]]) ; CHECK: jumpr r31 define <128 x i8> @test_182(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1626,7 +1626,7 @@ define <128 x i8> @test_182(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_183: ; CHECK: r[[REG183:[0-9]+]] = #55 -; CHECK: v0 = valign(v1,v1,r[[REG183]]) +; CHECK: v0 = valign(v0,v1,r[[REG183]]) ; CHECK: jumpr r31 define <128 x i8> @test_183(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1635,7 +1635,7 @@ define <128 x i8> @test_183(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_184: ; CHECK: r[[REG184:[0-9]+]] = #56 -; CHECK: v0 = valign(v1,v1,r[[REG184]]) +; CHECK: v0 = valign(v0,v1,r[[REG184]]) ; CHECK: jumpr r31 define <128 x i8> @test_184(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1644,7 +1644,7 @@ define <128 x i8> @test_184(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_185: ; CHECK: r[[REG185:[0-9]+]] = #57 -; CHECK: v0 = valign(v1,v1,r[[REG185]]) +; CHECK: v0 = valign(v0,v1,r[[REG185]]) ; CHECK: jumpr r31 define <128 x i8> @test_185(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1653,7 +1653,7 @@ define <128 x i8> @test_185(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_186: ; CHECK: r[[REG186:[0-9]+]] = #58 -; CHECK: v0 = valign(v1,v1,r[[REG186]]) +; CHECK: v0 = valign(v0,v1,r[[REG186]]) ; CHECK: jumpr r31 define <128 x i8> @test_186(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1662,7 +1662,7 @@ define <128 x i8> @test_186(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_187: ; CHECK: r[[REG187:[0-9]+]] = #59 -; CHECK: v0 = valign(v1,v1,r[[REG187]]) +; CHECK: v0 = valign(v0,v1,r[[REG187]]) ; CHECK: jumpr r31 define <128 x i8> @test_187(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1671,7 +1671,7 @@ define <128 x i8> @test_187(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_188: ; CHECK: r[[REG188:[0-9]+]] = #60 -; CHECK: v0 = valign(v1,v1,r[[REG188]]) +; CHECK: v0 = valign(v0,v1,r[[REG188]]) ; CHECK: jumpr r31 define <128 x i8> @test_188(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1680,7 +1680,7 @@ define <128 x i8> @test_188(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_189: ; CHECK: r[[REG189:[0-9]+]] = #61 -; CHECK: v0 = valign(v1,v1,r[[REG189]]) +; CHECK: v0 = valign(v0,v1,r[[REG189]]) ; CHECK: jumpr r31 define <128 x i8> @test_189(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> @@ -1689,7 +1689,7 @@ define <128 x i8> @test_189(<128 x i8> %v0, <128 x i8> %v1) #0 { ; CHECK-LABEL: test_190: ; CHECK: r[[REG190:[0-9]+]] = #62 -; CHECK: v0 = valign(v1,v1,r[[REG190]]) +; CHECK: v0 = valign(v0,v1,r[[REG190]]) ; CHECK: jumpr r31 define <128 x i8> @test_190(<128 x i8> %v0, <128 x i8> %v1) #0 { %t0 = shufflevector <128 x i8> %v0, <128 x i8> %v1, <128 x i32> diff --git a/llvm/test/CodeGen/Hexagon/autohvx/align2-64b.ll b/llvm/test/CodeGen/Hexagon/autohvx/align2-64b.ll index 51697d3..34bc044 100644 --- a/llvm/test/CodeGen/Hexagon/autohvx/align2-64b.ll +++ b/llvm/test/CodeGen/Hexagon/autohvx/align2-64b.ll @@ -570,7 +570,7 @@ define <64 x i8> @test_64(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_65: -; CHECK: v0 = valign(v1,v1,#1) +; CHECK: v0 = valign(v0,v1,#1) ; CHECK: jumpr r31 define <64 x i8> @test_65(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -578,7 +578,7 @@ define <64 x i8> @test_65(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_66: -; CHECK: v0 = valign(v1,v1,#2) +; CHECK: v0 = valign(v0,v1,#2) ; CHECK: jumpr r31 define <64 x i8> @test_66(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -586,7 +586,7 @@ define <64 x i8> @test_66(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_67: -; CHECK: v0 = valign(v1,v1,#3) +; CHECK: v0 = valign(v0,v1,#3) ; CHECK: jumpr r31 define <64 x i8> @test_67(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -594,7 +594,7 @@ define <64 x i8> @test_67(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_68: -; CHECK: v0 = valign(v1,v1,#4) +; CHECK: v0 = valign(v0,v1,#4) ; CHECK: jumpr r31 define <64 x i8> @test_68(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -602,7 +602,7 @@ define <64 x i8> @test_68(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_69: -; CHECK: v0 = valign(v1,v1,#5) +; CHECK: v0 = valign(v0,v1,#5) ; CHECK: jumpr r31 define <64 x i8> @test_69(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -610,7 +610,7 @@ define <64 x i8> @test_69(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_70: -; CHECK: v0 = valign(v1,v1,#6) +; CHECK: v0 = valign(v0,v1,#6) ; CHECK: jumpr r31 define <64 x i8> @test_70(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -618,7 +618,7 @@ define <64 x i8> @test_70(<64 x i8> %v0, <64 x i8> %v1) #0 { } ; CHECK-LABEL: test_71: -; CHECK: v0 = valign(v1,v1,#7) +; CHECK: v0 = valign(v0,v1,#7) ; CHECK: jumpr r31 define <64 x i8> @test_71(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -627,7 +627,7 @@ define <64 x i8> @test_71(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_72: ; CHECK: r[[REG72:[0-9]+]] = #8 -; CHECK: v0 = valign(v1,v1,r[[REG72]]) +; CHECK: v0 = valign(v0,v1,r[[REG72]]) ; CHECK: jumpr r31 define <64 x i8> @test_72(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -636,7 +636,7 @@ define <64 x i8> @test_72(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_73: ; CHECK: r[[REG73:[0-9]+]] = #9 -; CHECK: v0 = valign(v1,v1,r[[REG73]]) +; CHECK: v0 = valign(v0,v1,r[[REG73]]) ; CHECK: jumpr r31 define <64 x i8> @test_73(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -645,7 +645,7 @@ define <64 x i8> @test_73(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_74: ; CHECK: r[[REG74:[0-9]+]] = #10 -; CHECK: v0 = valign(v1,v1,r[[REG74]]) +; CHECK: v0 = valign(v0,v1,r[[REG74]]) ; CHECK: jumpr r31 define <64 x i8> @test_74(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -654,7 +654,7 @@ define <64 x i8> @test_74(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_75: ; CHECK: r[[REG75:[0-9]+]] = #11 -; CHECK: v0 = valign(v1,v1,r[[REG75]]) +; CHECK: v0 = valign(v0,v1,r[[REG75]]) ; CHECK: jumpr r31 define <64 x i8> @test_75(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -663,7 +663,7 @@ define <64 x i8> @test_75(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_76: ; CHECK: r[[REG76:[0-9]+]] = #12 -; CHECK: v0 = valign(v1,v1,r[[REG76]]) +; CHECK: v0 = valign(v0,v1,r[[REG76]]) ; CHECK: jumpr r31 define <64 x i8> @test_76(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -672,7 +672,7 @@ define <64 x i8> @test_76(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_77: ; CHECK: r[[REG77:[0-9]+]] = #13 -; CHECK: v0 = valign(v1,v1,r[[REG77]]) +; CHECK: v0 = valign(v0,v1,r[[REG77]]) ; CHECK: jumpr r31 define <64 x i8> @test_77(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -681,7 +681,7 @@ define <64 x i8> @test_77(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_78: ; CHECK: r[[REG78:[0-9]+]] = #14 -; CHECK: v0 = valign(v1,v1,r[[REG78]]) +; CHECK: v0 = valign(v0,v1,r[[REG78]]) ; CHECK: jumpr r31 define <64 x i8> @test_78(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -690,7 +690,7 @@ define <64 x i8> @test_78(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_79: ; CHECK: r[[REG79:[0-9]+]] = #15 -; CHECK: v0 = valign(v1,v1,r[[REG79]]) +; CHECK: v0 = valign(v0,v1,r[[REG79]]) ; CHECK: jumpr r31 define <64 x i8> @test_79(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -699,7 +699,7 @@ define <64 x i8> @test_79(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_80: ; CHECK: r[[REG80:[0-9]+]] = #16 -; CHECK: v0 = valign(v1,v1,r[[REG80]]) +; CHECK: v0 = valign(v0,v1,r[[REG80]]) ; CHECK: jumpr r31 define <64 x i8> @test_80(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -708,7 +708,7 @@ define <64 x i8> @test_80(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_81: ; CHECK: r[[REG81:[0-9]+]] = #17 -; CHECK: v0 = valign(v1,v1,r[[REG81]]) +; CHECK: v0 = valign(v0,v1,r[[REG81]]) ; CHECK: jumpr r31 define <64 x i8> @test_81(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -717,7 +717,7 @@ define <64 x i8> @test_81(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_82: ; CHECK: r[[REG82:[0-9]+]] = #18 -; CHECK: v0 = valign(v1,v1,r[[REG82]]) +; CHECK: v0 = valign(v0,v1,r[[REG82]]) ; CHECK: jumpr r31 define <64 x i8> @test_82(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -726,7 +726,7 @@ define <64 x i8> @test_82(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_83: ; CHECK: r[[REG83:[0-9]+]] = #19 -; CHECK: v0 = valign(v1,v1,r[[REG83]]) +; CHECK: v0 = valign(v0,v1,r[[REG83]]) ; CHECK: jumpr r31 define <64 x i8> @test_83(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -735,7 +735,7 @@ define <64 x i8> @test_83(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_84: ; CHECK: r[[REG84:[0-9]+]] = #20 -; CHECK: v0 = valign(v1,v1,r[[REG84]]) +; CHECK: v0 = valign(v0,v1,r[[REG84]]) ; CHECK: jumpr r31 define <64 x i8> @test_84(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -744,7 +744,7 @@ define <64 x i8> @test_84(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_85: ; CHECK: r[[REG85:[0-9]+]] = #21 -; CHECK: v0 = valign(v1,v1,r[[REG85]]) +; CHECK: v0 = valign(v0,v1,r[[REG85]]) ; CHECK: jumpr r31 define <64 x i8> @test_85(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -753,7 +753,7 @@ define <64 x i8> @test_85(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_86: ; CHECK: r[[REG86:[0-9]+]] = #22 -; CHECK: v0 = valign(v1,v1,r[[REG86]]) +; CHECK: v0 = valign(v0,v1,r[[REG86]]) ; CHECK: jumpr r31 define <64 x i8> @test_86(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -762,7 +762,7 @@ define <64 x i8> @test_86(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_87: ; CHECK: r[[REG87:[0-9]+]] = #23 -; CHECK: v0 = valign(v1,v1,r[[REG87]]) +; CHECK: v0 = valign(v0,v1,r[[REG87]]) ; CHECK: jumpr r31 define <64 x i8> @test_87(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -771,7 +771,7 @@ define <64 x i8> @test_87(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_88: ; CHECK: r[[REG88:[0-9]+]] = #24 -; CHECK: v0 = valign(v1,v1,r[[REG88]]) +; CHECK: v0 = valign(v0,v1,r[[REG88]]) ; CHECK: jumpr r31 define <64 x i8> @test_88(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -780,7 +780,7 @@ define <64 x i8> @test_88(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_89: ; CHECK: r[[REG89:[0-9]+]] = #25 -; CHECK: v0 = valign(v1,v1,r[[REG89]]) +; CHECK: v0 = valign(v0,v1,r[[REG89]]) ; CHECK: jumpr r31 define <64 x i8> @test_89(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -789,7 +789,7 @@ define <64 x i8> @test_89(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_90: ; CHECK: r[[REG90:[0-9]+]] = #26 -; CHECK: v0 = valign(v1,v1,r[[REG90]]) +; CHECK: v0 = valign(v0,v1,r[[REG90]]) ; CHECK: jumpr r31 define <64 x i8> @test_90(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -798,7 +798,7 @@ define <64 x i8> @test_90(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_91: ; CHECK: r[[REG91:[0-9]+]] = #27 -; CHECK: v0 = valign(v1,v1,r[[REG91]]) +; CHECK: v0 = valign(v0,v1,r[[REG91]]) ; CHECK: jumpr r31 define <64 x i8> @test_91(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -807,7 +807,7 @@ define <64 x i8> @test_91(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_92: ; CHECK: r[[REG92:[0-9]+]] = #28 -; CHECK: v0 = valign(v1,v1,r[[REG92]]) +; CHECK: v0 = valign(v0,v1,r[[REG92]]) ; CHECK: jumpr r31 define <64 x i8> @test_92(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -816,7 +816,7 @@ define <64 x i8> @test_92(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_93: ; CHECK: r[[REG93:[0-9]+]] = #29 -; CHECK: v0 = valign(v1,v1,r[[REG93]]) +; CHECK: v0 = valign(v0,v1,r[[REG93]]) ; CHECK: jumpr r31 define <64 x i8> @test_93(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> @@ -825,7 +825,7 @@ define <64 x i8> @test_93(<64 x i8> %v0, <64 x i8> %v1) #0 { ; CHECK-LABEL: test_94: ; CHECK: r[[REG94:[0-9]+]] = #30 -; CHECK: v0 = valign(v1,v1,r[[REG94]]) +; CHECK: v0 = valign(v0,v1,r[[REG94]]) ; CHECK: jumpr r31 define <64 x i8> @test_94(<64 x i8> %v0, <64 x i8> %v1) #0 { %t0 = shufflevector <64 x i8> %v0, <64 x i8> %v1, <64 x i32> diff --git a/llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-128b.ll b/llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-128b.ll new file mode 100644 index 0000000..41e195d --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-128b.ll @@ -0,0 +1,240 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -march=hexagon < %s | FileCheck %s + +define <128 x i8> @test_00(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_00: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v0,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_01(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_01: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_02(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_02: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_03(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_03: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: q0 = vsetq(r0) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vmux(q0,v0,v1) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_04(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_04: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vror(v0,r0) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_05(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_05: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v0,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_06(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_06: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = valign(v1,v0,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_07(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_07: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_08(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_08: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v1,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_09(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_09: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: q0 = vsetq(r0) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vmux(q0,v1,v0) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_10(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_10: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v1,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_11(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_11: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_12(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_12: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = valign(v0,v1,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_13(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_13: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v1,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_14(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_14: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vror(v1,r0) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +define <128 x i8> @test_15(<128 x i8> %a0, <128 x i8> %a1) #0 { +; CHECK-LABEL: test_15: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #64 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v1,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <128 x i8> %a0, <128 x i8> %a1, <128 x i32> + ret <128 x i8> %v0 +} + +attributes #0 = { nounwind readnone "target-features"="+hvx,+hvx-length128b" } + diff --git a/llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-64b.ll b/llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-64b.ll new file mode 100644 index 0000000..4d87673 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-64b.ll @@ -0,0 +1,239 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -march=hexagon < %s | FileCheck %s + +define <64 x i8> @test_00(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_00: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v0,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_01(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_01: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_02(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_02: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_03(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_03: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: q0 = vsetq(r0) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vmux(q0,v0,v1) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_04(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_04: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vror(v0,r0) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_05(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_05: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v0,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_06(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_06: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = valign(v1,v0,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_07(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_07: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v0,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_08(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_08: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v1,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_09(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_09: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: q0 = vsetq(r0) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vmux(q0,v1,v0) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_10(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_10: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v1,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_11(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_11: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_12(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_12: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = valign(v0,v1,r7) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_13(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_13: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v0,v1,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_14(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_14: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r0 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = vror(v1,r0) +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +define <64 x i8> @test_15(<64 x i8> %a0, <64 x i8> %a1) #0 { +; CHECK-LABEL: test_15: +; CHECK: // %bb.0: +; CHECK-NEXT: { +; CHECK-NEXT: r7 = #32 +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v1:0 = vshuff(v1,v1,r7) +; CHECK-NEXT: } +; CHECK-NEXT: { +; CHECK-NEXT: v0 = v1 +; CHECK-NEXT: jumpr r31 +; CHECK-NEXT: } + %v0 = shufflevector <64 x i8> %a0, <64 x i8> %a1, <64 x i32> + ret <64 x i8> %v0 +} + +attributes #0 = { nounwind readnone "target-features"="+hvx,+hvx-length64b" }