From: Bencheng Jing Date: Thu, 14 Mar 2019 14:22:01 +0000 (+0800) Subject: amvecm: fix g12a/g12b sharpness0 addr wrong [2/2] X-Git-Tag: khadas-vims-v0.9.6-release~787 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e7b027fe18dae21a60d86ee97113afc87740bf33;p=platform%2Fkernel%2Flinux-amlogic.git amvecm: fix g12a/g12b sharpness0 addr wrong [2/2] PD#SWPL-5919 Problem: add offset for g12a/g12b sharpness0 Solution: db offset for g12a/g12b sharpness0 Verify: u212 Change-Id: I9d800d7c8b4446cb19dc39777bc1f940b0d6124c Signed-off-by: Bencheng Jing --- diff --git a/drivers/amlogic/media/enhancement/amvecm/amvecm.c b/drivers/amlogic/media/enhancement/amvecm/amvecm.c index 027c4d0..1793885 100644 --- a/drivers/amlogic/media/enhancement/amvecm/amvecm.c +++ b/drivers/amlogic/media/enhancement/amvecm/amvecm.c @@ -5410,6 +5410,24 @@ static ssize_t amvecm_lc_store(struct class *cls, /* #if (MESON_CPU_TYPE == MESON_CPU_TYPE_MESONG9TV) */ void init_pq_setting(void) { + if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() || + is_meson_txlx_cpu() || is_meson_txhd_cpu() || + is_meson_tl1_cpu()) + goto tvchip_pq_setting; + else if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) { + sr_offset[0] = SR0_OFFSET; + /*dnlp off*/ + WRITE_VPP_REG_BITS(VPP_VE_ENABLE_CTRL, 0, + DNLP_EN_BIT, DNLP_EN_WID); + /*sr0 chroma filter bypass*/ + WRITE_VPP_REG(SRSHARP0_SHARP_SR2_CBIC_HCOEF0 + sr_offset[0], + 0x4000); + WRITE_VPP_REG(SRSHARP0_SHARP_SR2_CBIC_VCOEF0 + sr_offset[0], + 0x4000); + } + return; + +tvchip_pq_setting: if (get_cpu_type() == MESON_CPU_MAJOR_ID_TL1) { /*sr0 & sr1 register shfit*/ sr_offset[0] = SR0_OFFSET; @@ -5812,11 +5830,7 @@ static int aml_vecm_probe(struct platform_device *pdev) /* register vout client */ vout_register_client(&vlock_notifier_nb); - /* #if (MESON_CPU_TYPE == MESON_CPU_TYPE_MESONG9TV) */ - if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() || - is_meson_txlx_cpu() || is_meson_txhd_cpu() || - is_meson_tl1_cpu()) - init_pq_setting(); + init_pq_setting(); /* #endif */ vpp_get_hist_en();