From: Marek Olšák Date: Thu, 23 Sep 2021 15:11:07 +0000 (-0400) Subject: ac/llvm: add vindex into ac_build_buffer_store_dword X-Git-Tag: upstream/22.3.5~14329 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e6aac44051852511fbeddafe0f845faf1e3e80d5;p=platform%2Fupstream%2Fmesa.git ac/llvm: add vindex into ac_build_buffer_store_dword for future work Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c index 8154104..fb2519e 100644 --- a/src/amd/llvm/ac_llvm_build.c +++ b/src/amd/llvm/ac_llvm_build.c @@ -51,6 +51,12 @@ struct ac_llvm_flow { LLVMBasicBlockRef loop_entry_block; }; +static void ac_build_tbuffer_store(struct ac_llvm_context *ctx, LLVMValueRef rsrc, + LLVMValueRef vdata, LLVMValueRef vindex, LLVMValueRef voffset, + LLVMValueRef soffset, LLVMValueRef immoffset, + unsigned num_channels, unsigned dfmt, unsigned nfmt, + unsigned cache_policy, bool structurized); + /* Initialize module-independent parts of the context. * * The caller is responsible for initializing ctx::module and ctx::builder. @@ -1155,8 +1161,8 @@ void ac_build_buffer_store_format(struct ac_llvm_context *ctx, LLVMValueRef rsrc * or v4i32 (num_channels=3,4). */ void ac_build_buffer_store_dword(struct ac_llvm_context *ctx, LLVMValueRef rsrc, LLVMValueRef vdata, - unsigned num_channels, LLVMValueRef voffset, LLVMValueRef soffset, - unsigned inst_offset, unsigned cache_policy) + unsigned num_channels, LLVMValueRef vindex, LLVMValueRef voffset, + LLVMValueRef soffset, unsigned inst_offset, unsigned cache_policy) { /* Split 3 channel stores. */ if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false)) { @@ -1167,8 +1173,8 @@ void ac_build_buffer_store_dword(struct ac_llvm_context *ctx, LLVMValueRef rsrc, } v01 = ac_build_gather_values(ctx, v, 2); - ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset, soffset, inst_offset, cache_policy); - ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset, soffset, inst_offset + 8, + ac_build_buffer_store_dword(ctx, rsrc, v01, 2, vindex, voffset, soffset, inst_offset, cache_policy); + ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, vindex, voffset, soffset, inst_offset + 8, cache_policy); return; } @@ -1183,7 +1189,7 @@ void ac_build_buffer_store_dword(struct ac_llvm_context *ctx, LLVMValueRef rsrc, if (inst_offset) offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, inst_offset, 0), ""); - ac_build_buffer_store_common(ctx, rsrc, ac_to_float(ctx, vdata), ctx->i32_0, voffset, offset, + ac_build_buffer_store_common(ctx, rsrc, ac_to_float(ctx, vdata), vindex, voffset, offset, cache_policy, false, false); return; } @@ -1195,8 +1201,8 @@ void ac_build_buffer_store_dword(struct ac_llvm_context *ctx, LLVMValueRef rsrc, unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT; LLVMValueRef immoffset = LLVMConstInt(ctx->i32, inst_offset, 0); - ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset, immoffset, num_channels, dfmt, - nfmt, cache_policy); + ac_build_tbuffer_store(ctx, rsrc, vdata, vindex, voffset, soffset, immoffset, num_channels, dfmt, + nfmt, cache_policy, false); } static LLVMValueRef ac_build_buffer_load_common(struct ac_llvm_context *ctx, LLVMValueRef rsrc, diff --git a/src/amd/llvm/ac_llvm_build.h b/src/amd/llvm/ac_llvm_build.h index 1f38cbd..1fc9b55 100644 --- a/src/amd/llvm/ac_llvm_build.h +++ b/src/amd/llvm/ac_llvm_build.h @@ -254,8 +254,8 @@ LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx, LLVMValueRef base_ptr, LLVMValueRef index); void ac_build_buffer_store_dword(struct ac_llvm_context *ctx, LLVMValueRef rsrc, LLVMValueRef vdata, - unsigned num_channels, LLVMValueRef voffset, LLVMValueRef soffset, - unsigned inst_offset, unsigned cache_policy); + unsigned num_channels, LLVMValueRef vindex, LLVMValueRef voffset, + LLVMValueRef soffset, unsigned inst_offset, unsigned cache_policy); void ac_build_buffer_store_format(struct ac_llvm_context *ctx, LLVMValueRef rsrc, LLVMValueRef data, LLVMValueRef vindex, LLVMValueRef voffset, unsigned cache_policy); diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 697bab0..ee44d55 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -1866,8 +1866,8 @@ static void visit_store_ssbo(struct ac_nir_context *ctx, nir_intrinsic_instr *in } data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, ""); - ac_build_buffer_store_dword(&ctx->ac, rsrc, data, num_channels, offset, ctx->ac.i32_0, 0, - cache_policy); + ac_build_buffer_store_dword(&ctx->ac, rsrc, data, num_channels, NULL, offset, + ctx->ac.i32_0, 0, cache_policy); } } @@ -4210,7 +4210,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins cache_policy |= ac_slc; ac_build_buffer_store_dword(&ctx->ac, descriptor, store_data, num_components, - addr_voffset, addr_soffset, const_offset, + NULL, addr_voffset, addr_soffset, const_offset, cache_policy); break; } diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 21acf41..edcdfa2 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -338,7 +338,7 @@ visit_emit_vertex_with_counter(struct ac_shader_abi *abi, unsigned stream, LLVMV out_val = ac_to_integer(&ctx->ac, out_val); out_val = LLVMBuildZExtOrBitCast(ctx->ac.builder, out_val, ctx->ac.i32, ""); - ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring[stream], out_val, 1, voffset, + ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring[stream], out_val, 1, NULL, voffset, ac_get_arg(&ctx->ac, ctx->args->ac.gs2vs_offset), 0, ac_glc | ac_slc | ac_swizzled); } @@ -1103,8 +1103,8 @@ radv_emit_stream_output(struct radv_shader_context *ctx, LLVMValueRef const *so_ break; } - ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf], vdata, num_comps, so_write_offsets[buf], - ctx->ac.i32_0, offset, ac_glc | ac_slc); + ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf], vdata, num_comps, NULL, + so_write_offsets[buf], ctx->ac.i32_0, offset, ac_glc | ac_slc); } static void diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c index f3cc145..be679bc 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c @@ -176,7 +176,7 @@ void si_llvm_emit_es_epilogue(struct ac_shader_abi *abi) continue; } - ac_build_buffer_store_dword(&ctx->ac, ctx->esgs_ring, out_val, 1, NULL, + ac_build_buffer_store_dword(&ctx->ac, ctx->esgs_ring, out_val, 1, NULL, NULL, ac_get_arg(&ctx->ac, ctx->args.es2gs_offset), (4 * param + chan) * 4, ac_glc | ac_slc | ac_swizzled); } @@ -277,8 +277,8 @@ static void si_llvm_emit_vertex(struct ac_shader_abi *abi, unsigned stream, LLVM out_val = ac_to_integer(&ctx->ac, out_val); - ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring[stream], out_val, 1, voffset, soffset, - 0, ac_glc | ac_slc | ac_swizzled); + ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring[stream], out_val, 1, NULL, + voffset, soffset, 0, ac_glc | ac_slc | ac_swizzled); } } diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c index b0aa0a0..c1b4e64 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c @@ -537,7 +537,7 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, values[chan] = value; if (writemask != 0xF && !is_tess_factor) { - ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1, addr, base, + ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1, NULL, addr, base, 4 * chan, ac_glc); } @@ -555,7 +555,7 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, if (writemask == 0xF && !is_tess_factor) { LLVMValueRef value = ac_build_gather_values(&ctx->ac, values, 4); - ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, addr, base, 0, ac_glc); + ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, NULL, addr, base, 0, ac_glc); } } @@ -662,7 +662,7 @@ static void si_copy_tcs_inputs(struct si_shader_context *ctx) LLVMValueRef value = lshs_lds_load(ctx, ctx->ac.i32, ~0, lds_ptr); - ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buffer_addr, buffer_offset, 0, + ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, NULL, buffer_addr, buffer_offset, 0, ac_glc); } } @@ -775,18 +775,18 @@ static void si_write_tess_factors(struct si_shader_context *ctx, LLVMValueRef re ac_build_ifcc(&ctx->ac, LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, rel_patch_id, ctx->ac.i32_0, ""), 6504); ac_build_buffer_store_dword(&ctx->ac, buffer, LLVMConstInt(ctx->ac.i32, 0x80000000, 0), 1, - ctx->ac.i32_0, tf_base, offset, ac_glc); + NULL, ctx->ac.i32_0, tf_base, offset, ac_glc); ac_build_endif(&ctx->ac, 6504); offset += 4; } /* Store the tessellation factors. */ - ac_build_buffer_store_dword(&ctx->ac, buffer, vec0, MIN2(stride, 4), byteoffset, tf_base, offset, - ac_glc); + ac_build_buffer_store_dword(&ctx->ac, buffer, vec0, MIN2(stride, 4), NULL, byteoffset, + tf_base, offset, ac_glc); offset += 16; if (vec1) - ac_build_buffer_store_dword(&ctx->ac, buffer, vec1, stride - 4, byteoffset, tf_base, offset, - ac_glc); + ac_build_buffer_store_dword(&ctx->ac, buffer, vec1, stride - 4, NULL, byteoffset, + tf_base, offset, ac_glc); /* Store the tess factors into the offchip buffer if TES reads them. */ if (shader->key.ge.part.tcs.epilog.tes_reads_tess_factors) { @@ -806,8 +806,8 @@ static void si_write_tess_factors(struct si_shader_context *ctx, LLVMValueRef re : util_next_power_of_two(outer_comps); outer_vec = ac_build_gather_values(&ctx->ac, outer, outer_vec_size); - ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec, outer_comps, tf_outer_offset, base, 0, - ac_glc); + ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec, outer_comps, NULL, tf_outer_offset, + base, 0, ac_glc); if (inner_comps) { param_inner = si_shader_io_get_unique_index_patch(VARYING_SLOT_TESS_LEVEL_INNER); tf_inner_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL, @@ -815,8 +815,8 @@ static void si_write_tess_factors(struct si_shader_context *ctx, LLVMValueRef re inner_vec = inner_comps == 1 ? inner[0] : ac_build_gather_values(&ctx->ac, inner, inner_comps); - ac_build_buffer_store_dword(&ctx->ac, buf, inner_vec, inner_comps, tf_inner_offset, base, - 0, ac_glc); + ac_build_buffer_store_dword(&ctx->ac, buf, inner_vec, inner_comps, NULL, + tf_inner_offset, base, 0, ac_glc); } } diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c index d14f8a7..1fed7cb 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c @@ -310,7 +310,7 @@ void si_llvm_streamout_store_output(struct si_shader_context *ctx, LLVMValueRef break; } - ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf_idx], vdata, num_comps, + ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf_idx], vdata, num_comps, NULL, so_write_offsets[buf_idx], ctx->ac.i32_0, stream_out->dst_offset * 4, ac_glc | ac_slc); }