From: eopXD Date: Wed, 1 Feb 2023 04:49:31 +0000 (-0800) Subject: [Clang][RISCV] Bump rvv intrinsics version to v0.11 X-Git-Tag: upstream/17.0.6~18843 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e685bde1e0b0dcfeb1619b434a5dce3c755b9631;p=platform%2Fupstream%2Fllvm.git [Clang][RISCV] Bump rvv intrinsics version to v0.11 The LLVM now supports v0.11 of the RVV intrinsics. Users can use the macro `riscv_v_intrinsic` to distinguish what kind of intrinsics is supported in the compiler. Please refer to tag descriptions under https://github.com/riscv-non-isa/rvv-intrinsic-doc/tags Reviewed By: kito-cheng, asb Differential Revision: https://reviews.llvm.org/D143051 --- diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp index 25fda05..7c80165 100644 --- a/clang/lib/Basic/Targets/RISCV.cpp +++ b/clang/lib/Basic/Targets/RISCV.cpp @@ -197,8 +197,8 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts, if (ISAInfo->hasExtension("zve32x")) { Builder.defineMacro("__riscv_vector"); - // Currently we support the v0.10 RISC-V V intrinsics. - Builder.defineMacro("__riscv_v_intrinsic", Twine(getVersionValue(0, 10))); + // Currently we support the v0.11 RISC-V V intrinsics. + Builder.defineMacro("__riscv_v_intrinsic", Twine(getVersionValue(0, 11))); } } diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index e312ea0..9f3ab6f 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -267,7 +267,7 @@ // RUN: | FileCheck --check-prefix=CHECK-ZVE64D-EXT %s // CHECK-ZVE64D-EXT: __riscv_v_elen 64 // CHECK-ZVE64D-EXT: __riscv_v_elen_fp 64 -// CHECK-ZVE64D-EXT: __riscv_v_intrinsic 10000{{$}} +// CHECK-ZVE64D-EXT: __riscv_v_intrinsic 11000{{$}} // CHECK-ZVE64D-EXT: __riscv_v_min_vlen 64 // CHECK-ZVE64D-EXT: __riscv_vector 1 // CHECK-ZVE64D-EXT: __riscv_zve32f 1000000{{$}} @@ -281,7 +281,7 @@ // RUN: | FileCheck --check-prefix=CHECK-ZVE64F-EXT %s // CHECK-ZVE64F-EXT: __riscv_v_elen 64 // CHECK-ZVE64F-EXT: __riscv_v_elen_fp 32 -// CHECK-ZVE64F-EXT: __riscv_v_intrinsic 10000{{$}} +// CHECK-ZVE64F-EXT: __riscv_v_intrinsic 11000{{$}} // CHECK-ZVE64F-EXT: __riscv_v_min_vlen 64 // CHECK-ZVE64F-EXT: __riscv_vector 1 // CHECK-ZVE64F-EXT: __riscv_zve32f 1000000{{$}} @@ -294,7 +294,7 @@ // RUN: | FileCheck --check-prefix=CHECK-ZVE64X-EXT %s // CHECK-ZVE64X-EXT: __riscv_v_elen 64 // CHECK-ZVE64X-EXT: __riscv_v_elen_fp 0 -// CHECK-ZVE64X-EXT: __riscv_v_intrinsic 10000{{$}} +// CHECK-ZVE64X-EXT: __riscv_v_intrinsic 11000{{$}} // CHECK-ZVE64X-EXT: __riscv_v_min_vlen 64 // CHECK-ZVE64X-EXT: __riscv_vector 1 // CHECK-ZVE64X-EXT: __riscv_zve32x 1000000{{$}} @@ -305,7 +305,7 @@ // RUN: | FileCheck --check-prefix=CHECK-ZVE32F-EXT %s // CHECK-ZVE32F-EXT: __riscv_v_elen 32 // CHECK-ZVE32F-EXT: __riscv_v_elen_fp 32 -// CHECK-ZVE32F-EXT: __riscv_v_intrinsic 10000{{$}} +// CHECK-ZVE32F-EXT: __riscv_v_intrinsic 11000{{$}} // CHECK-ZVE32F-EXT: __riscv_v_min_vlen 32 // CHECK-ZVE32F-EXT: __riscv_vector 1 // CHECK-ZVE32F-EXT: __riscv_zve32f 1000000{{$}} @@ -316,7 +316,7 @@ // RUN: | FileCheck --check-prefix=CHECK-ZVE32X-EXT %s // CHECK-ZVE32X-EXT: __riscv_v_elen 32 // CHECK-ZVE32X-EXT: __riscv_v_elen_fp 0 -// CHECK-ZVE32X-EXT: __riscv_v_intrinsic 10000{{$}} +// CHECK-ZVE32X-EXT: __riscv_v_intrinsic 11000{{$}} // CHECK-ZVE32X-EXT: __riscv_v_min_vlen 32 // CHECK-ZVE32X-EXT: __riscv_vector 1 // CHECK-ZVE32X-EXT: __riscv_zve32x 1000000{{$}}