From: David Malcolm Date: Mon, 25 Aug 2014 19:43:06 +0000 (+0000) Subject: config/tilepro: Use rtx_insn X-Git-Tag: upstream/12.2.0~60852 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e51f5c08d719d2ba9db128b3d2777cb6bde9b78a;p=platform%2Fupstream%2Fgcc.git config/tilepro: Use rtx_insn gcc/ * config/tilepro/tilepro-protos.h (tilepro_output_cbranch_with_opcode): Strengthen param 1 from rtx to rtx_insn *. (tilepro_output_cbranch): Likewise. (tilepro_adjust_insn_length): Likewise. (tilepro_final_prescan_insn): Likewise for sole param. * config/tilepro/tilepro.c (tilepro_legitimize_tls_address): Likewise for local "last". (cbranch_predicted_p): Likewise for param "insn". (tilepro_output_simple_cbranch_with_opcode): Likewise. (tilepro_output_cbranch_with_opcode): Likewise. (tilepro_output_cbranch): Likewise. (frame_emit_load): Likewise for return type and locals "seq", "insn". (emit_sp_adjust): Likewise for return type and local "insn". (tilepro_expand_epilogue): Likewise for locals "last_insn", "insn". (tilepro_adjust_insn_length): Likewise for param "insn". (next_insn_to_bundle): Likewise for return type and params "r", "end". (tilepro_gen_bundles): Likewise for locals "insn", "next", "end". (replace_pc_relative_symbol_ref): Likewise for param "insn" and local "new_insns". (match_addli_pcrel): Likewise for param "insn". (replace_addli_pcrel): Likewise. (match_auli_pcrel): Likewise. (replace_auli_pcrel): Likewise. (tilepro_fixup_pcrel_references): Likewise for locals "insn", "next_insn". (reorder_var_tracking_notes): Likewise for locals "insn", "next", "queue", "next_queue", "prev". (tilepro_asm_output_mi_thunk): Likewise for local "insn". (tilepro_final_prescan_insn): Likewise for param "insn". From-SVN: r214465 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 22de79a..b82b8ec 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,41 @@ 2014-08-25 David Malcolm + * config/tilepro/tilepro-protos.h (tilepro_output_cbranch_with_opcode): + Strengthen param 1 from rtx to rtx_insn *. + (tilepro_output_cbranch): Likewise. + (tilepro_adjust_insn_length): Likewise. + (tilepro_final_prescan_insn): Likewise for sole param. + + * config/tilepro/tilepro.c (tilepro_legitimize_tls_address): + Likewise for local "last". + (cbranch_predicted_p): Likewise for param "insn". + (tilepro_output_simple_cbranch_with_opcode): Likewise. + (tilepro_output_cbranch_with_opcode): Likewise. + (tilepro_output_cbranch): Likewise. + (frame_emit_load): Likewise for return type and locals "seq", + "insn". + (emit_sp_adjust): Likewise for return type and local "insn". + (tilepro_expand_epilogue): Likewise for locals "last_insn", + "insn". + (tilepro_adjust_insn_length): Likewise for param "insn". + (next_insn_to_bundle): Likewise for return type and params + "r", "end". + (tilepro_gen_bundles): Likewise for locals "insn", "next", "end". + (replace_pc_relative_symbol_ref): Likewise for param "insn" and + local "new_insns". + (match_addli_pcrel): Likewise for param "insn". + (replace_addli_pcrel): Likewise. + (match_auli_pcrel): Likewise. + (replace_auli_pcrel): Likewise. + (tilepro_fixup_pcrel_references): Likewise for locals "insn", + "next_insn". + (reorder_var_tracking_notes): Likewise for locals "insn", "next", + "queue", "next_queue", "prev". + (tilepro_asm_output_mi_thunk): Likewise for local "insn". + (tilepro_final_prescan_insn): Likewise for param "insn". + +2014-08-25 David Malcolm + * config/tilegx/tilegx-protos.h (tilegx_output_cbranch_with_opcode): Strengthen param 1 from rtx to rtx_insn *. (tilegx_output_cbranch): Likewise. diff --git a/gcc/config/tilepro/tilepro-protos.h b/gcc/config/tilepro/tilepro-protos.h index fcd29ab..fe9b81b 100644 --- a/gcc/config/tilepro/tilepro-protos.h +++ b/gcc/config/tilepro/tilepro-protos.h @@ -44,11 +44,11 @@ extern void tilepro_expand_umulsi3_highpart (rtx, rtx, rtx); extern bool tilepro_emit_setcc (rtx[], enum machine_mode); extern void tilepro_emit_conditional_branch (rtx[], enum machine_mode); extern rtx tilepro_emit_conditional_move (rtx); -extern const char *tilepro_output_cbranch_with_opcode (rtx, rtx *, +extern const char *tilepro_output_cbranch_with_opcode (rtx_insn *, rtx *, const char *, const char *, int, bool); -extern const char *tilepro_output_cbranch (rtx, rtx *, bool); +extern const char *tilepro_output_cbranch (rtx_insn *, rtx *, bool); extern void tilepro_expand_tablejump (rtx, rtx); extern void tilepro_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx), enum machine_mode, rtx, @@ -62,10 +62,10 @@ extern void tilepro_expand_epilogue (bool); extern int tilepro_initial_elimination_offset (int, int); extern rtx tilepro_return_addr (int, rtx); extern rtx tilepro_eh_return_handler_rtx (void); -extern int tilepro_adjust_insn_length (rtx, int); +extern int tilepro_adjust_insn_length (rtx_insn *, int); extern int tilepro_asm_preferred_eh_data_format (int, int); -extern void tilepro_final_prescan_insn (rtx); +extern void tilepro_final_prescan_insn (rtx_insn *); extern const char *tilepro_asm_output_opcode (FILE *, const char *); extern void tilepro_function_profiler (FILE *, int); diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c index c27aca9..853de6b 100644 --- a/gcc/config/tilepro/tilepro.c +++ b/gcc/config/tilepro/tilepro.c @@ -897,7 +897,8 @@ tilepro_legitimize_tls_address (rtx addr) case TLS_MODEL_GLOBAL_DYNAMIC: case TLS_MODEL_LOCAL_DYNAMIC: { - rtx r0, temp1, temp2, temp3, got, last; + rtx r0, temp1, temp2, temp3, got; + rtx_insn *last; ret = gen_reg_rtx (Pmode); r0 = gen_rtx_REG (Pmode, 0); @@ -917,7 +918,8 @@ tilepro_legitimize_tls_address (rtx addr) } case TLS_MODEL_INITIAL_EXEC: { - rtx temp1, temp2, temp3, got, last; + rtx temp1, temp2, temp3, got; + rtx_insn *last; ret = gen_reg_rtx (Pmode); temp1 = gen_reg_rtx (Pmode); @@ -939,7 +941,8 @@ tilepro_legitimize_tls_address (rtx addr) } case TLS_MODEL_LOCAL_EXEC: { - rtx temp1, last; + rtx temp1; + rtx_insn *last; ret = gen_reg_rtx (Pmode); temp1 = gen_reg_rtx (Pmode); @@ -2422,7 +2425,7 @@ tilepro_emit_conditional_move (rtx cmp) /* Return true if INSN is annotated with a REG_BR_PROB note that indicates it's a branch that's predicted taken. */ static bool -cbranch_predicted_p (rtx insn) +cbranch_predicted_p (rtx_insn *insn) { rtx x = find_reg_note (insn, REG_BR_PROB, 0); @@ -2440,7 +2443,7 @@ cbranch_predicted_p (rtx insn) /* Output assembly code for a specific branch instruction, appending the branch prediction flag to the opcode if appropriate. */ static const char * -tilepro_output_simple_cbranch_with_opcode (rtx insn, const char *opcode, +tilepro_output_simple_cbranch_with_opcode (rtx_insn *insn, const char *opcode, int regop, bool netreg_p, bool reverse_predicted) { @@ -2455,7 +2458,7 @@ tilepro_output_simple_cbranch_with_opcode (rtx insn, const char *opcode, /* Output assembly code for a specific branch instruction, appending the branch prediction flag to the opcode if appropriate. */ const char * -tilepro_output_cbranch_with_opcode (rtx insn, rtx *operands, +tilepro_output_cbranch_with_opcode (rtx_insn *insn, rtx *operands, const char *opcode, const char *rev_opcode, int regop, bool netreg_p) @@ -2506,7 +2509,7 @@ tilepro_output_cbranch_with_opcode (rtx insn, rtx *operands, /* Output assembly code for a conditional branch instruction. */ const char * -tilepro_output_cbranch (rtx insn, rtx *operands, bool reversed) +tilepro_output_cbranch (rtx_insn *insn, rtx *operands, bool reversed) { enum rtx_code code = GET_CODE (operands[1]); const char *opcode; @@ -3302,7 +3305,7 @@ frame_emit_store (int regno, int regno_note, rtx addr, rtx cfa, /* Emit a load in the stack frame to load REGNO from address ADDR. Add a REG_CFA_RESTORE note to CFA_RESTORES if CFA_RESTORES is non-null. Return the emitted insn. */ -static rtx +static rtx_insn * frame_emit_load (int regno, rtx addr, rtx *cfa_restores) { rtx reg = gen_rtx_REG (Pmode, regno); @@ -3315,16 +3318,16 @@ frame_emit_load (int regno, rtx addr, rtx *cfa_restores) /* Helper function to set RTX_FRAME_RELATED_P on instructions, including sequences. */ -static rtx +static rtx_insn * set_frame_related_p (void) { - rtx seq = get_insns (); - rtx insn; + rtx_insn *seq = get_insns (); + rtx_insn *insn; end_sequence (); if (!seq) - return NULL_RTX; + return NULL; if (INSN_P (seq)) { @@ -3355,14 +3358,14 @@ set_frame_related_p (void) large register and using 'add'. This happens after reload, so we need to expand it ourselves. */ -static rtx +static rtx_insn * emit_sp_adjust (int offset, int *next_scratch_regno, bool frame_related, rtx reg_notes) { rtx to_add; rtx imm_rtx = gen_int_si (offset); - rtx insn; + rtx_insn *insn; if (satisfies_constraint_J (imm_rtx)) { /* We can add this using a single addi or addli. */ @@ -3686,7 +3689,7 @@ tilepro_expand_epilogue (bool sibcall_p) rtx reg_save_addr[ROUND_ROBIN_SIZE] = { NULL_RTX, NULL_RTX, NULL_RTX, NULL_RTX }; - rtx last_insn, insn; + rtx_insn *last_insn, *insn; unsigned int which_scratch; int offset, start_offset, regno; rtx cfa_restores = NULL_RTX; @@ -3908,7 +3911,7 @@ tilepro_frame_pointer_required (void) by attributes in the machine-description file. This is where we account for bundles. */ int -tilepro_adjust_insn_length (rtx insn, int length) +tilepro_adjust_insn_length (rtx_insn *insn, int length) { enum machine_mode mode = GET_MODE (insn); @@ -3972,8 +3975,8 @@ tilepro_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) /* Skip over irrelevant NOTEs and such and look for the next insn we would consider bundling. */ -static rtx -next_insn_to_bundle (rtx r, rtx end) +static rtx_insn * +next_insn_to_bundle (rtx_insn *r, rtx_insn *end) { for (; r != end; r = NEXT_INSN (r)) { @@ -3983,7 +3986,7 @@ next_insn_to_bundle (rtx r, rtx end) return r; } - return NULL_RTX; + return NULL; } @@ -3996,8 +3999,8 @@ tilepro_gen_bundles (void) basic_block bb; FOR_EACH_BB_FN (bb, cfun) { - rtx insn, next; - rtx end = NEXT_INSN (BB_END (bb)); + rtx_insn *insn, *next; + rtx_insn *end = NEXT_INSN (BB_END (bb)); for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next) { @@ -4031,9 +4034,9 @@ tilepro_gen_bundles (void) /* Helper function for tilepro_fixup_pcrel_references. */ static void -replace_pc_relative_symbol_ref (rtx insn, rtx opnds[4], bool first_insn_p) +replace_pc_relative_symbol_ref (rtx_insn *insn, rtx opnds[4], bool first_insn_p) { - rtx new_insns; + rtx_insn *new_insns; start_sequence (); @@ -4072,7 +4075,7 @@ replace_pc_relative_symbol_ref (rtx insn, rtx opnds[4], bool first_insn_p) /* Returns whether INSN is a pc-relative addli insn. */ static bool -match_addli_pcrel (rtx insn) +match_addli_pcrel (rtx_insn *insn) { rtx pattern = PATTERN (insn); rtx unspec; @@ -4095,7 +4098,7 @@ match_addli_pcrel (rtx insn) /* Helper function for tilepro_fixup_pcrel_references. */ static void -replace_addli_pcrel (rtx insn) +replace_addli_pcrel (rtx_insn *insn) { rtx pattern = PATTERN (insn); rtx set_src; @@ -4129,7 +4132,7 @@ replace_addli_pcrel (rtx insn) /* Returns whether INSN is a pc-relative auli insn. */ static bool -match_auli_pcrel (rtx insn) +match_auli_pcrel (rtx_insn *insn) { rtx pattern = PATTERN (insn); rtx high; @@ -4156,7 +4159,7 @@ match_auli_pcrel (rtx insn) /* Helper function for tilepro_fixup_pcrel_references. */ static void -replace_auli_pcrel (rtx insn) +replace_auli_pcrel (rtx_insn *insn) { rtx pattern = PATTERN (insn); rtx set_src; @@ -4230,7 +4233,7 @@ replace_auli_pcrel (rtx insn) static void tilepro_fixup_pcrel_references (void) { - rtx insn, next_insn; + rtx_insn *insn, *next_insn; bool same_section_as_entry = true; for (insn = get_insns (); insn; insn = next_insn) @@ -4267,8 +4270,8 @@ reorder_var_tracking_notes (void) basic_block bb; FOR_EACH_BB_FN (bb, cfun) { - rtx insn, next; - rtx queue = NULL_RTX; + rtx_insn *insn, *next; + rtx_insn *queue = NULL; bool in_bundle = false; for (insn = BB_HEAD (bb); insn != BB_END (bb); insn = next) @@ -4282,7 +4285,7 @@ reorder_var_tracking_notes (void) { while (queue) { - rtx next_queue = PREV_INSN (queue); + rtx_insn *next_queue = PREV_INSN (queue); SET_PREV_INSN (NEXT_INSN (insn)) = queue; SET_NEXT_INSN (queue) = NEXT_INSN (insn); SET_NEXT_INSN (insn) = queue; @@ -4298,7 +4301,7 @@ reorder_var_tracking_notes (void) { if (in_bundle) { - rtx prev = PREV_INSN (insn); + rtx_insn *prev = PREV_INSN (insn); SET_PREV_INSN (next) = prev; SET_NEXT_INSN (prev) = next; @@ -4371,7 +4374,8 @@ tilepro_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, tree function) { - rtx this_rtx, insn, funexp; + rtx this_rtx, funexp; + rtx_insn *insn; /* Pretend to be a post-reload pass while generating rtl. */ reload_completed = 1; @@ -4870,7 +4874,7 @@ static enum machine_mode insn_mode; /* Implement FINAL_PRESCAN_INSN. This is used to emit bundles. */ void -tilepro_final_prescan_insn (rtx insn) +tilepro_final_prescan_insn (rtx_insn *insn) { /* Record this for tilepro_asm_output_opcode to examine. */ insn_mode = GET_MODE (insn);