From: Simon Glass <sjg@chromium.org>
Date: Wed, 8 Oct 2014 04:01:38 +0000 (-0600)
Subject: Exynos: Use 900MHz ARM frequency in SPL for peach_pit
X-Git-Tag: v2014.10~3^2~6^2~17
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e4d761000a50447a2afca2447088dbf282edda64;p=platform%2Fkernel%2Fu-boot.git

Exynos: Use 900MHz ARM frequency in SPL for peach_pit

The device seems to hang in SPL if the full speed is used when booting from
USB, perhaps because the PMIC has not been set to the maximum ARM core
voltage yet. Slow it down to a reliable speed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
index 3ed70a8..207782e 100644
--- a/arch/arm/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -32,7 +32,7 @@
 		mem-manuf = "samsung";
 		mem-type = "ddr3";
 		clock-frequency = <800000000>;
-		arm-frequency = <1700000000>;
+		arm-frequency = <900000000>;
 	};
 
 	tmu@10060000 {