From: Geert Uytterhoeven Date: Fri, 9 Sep 2022 09:25:15 +0000 (+0200) Subject: clk: renesas: r8a779g0: Add EtherAVB clocks X-Git-Tag: v6.1-rc5~153^2~6^3^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e46a1a9943c0e84f439b971d6ce03f87e3d67441;p=platform%2Fkernel%2Flinux-starfive.git clk: renesas: r8a779g0: Add EtherAVB clocks Add the module clocks used by the Ethernet AVB (EtherAVB-IF) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Based on a larger patch in the BSP by Kazuya Mizuguchi. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/e9382b0d9acc84acc2357a6921a1459f3a32240e.1662714852.git.geert+renesas@glider.be --- diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index d40ad40..9641122 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -150,6 +150,9 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { + DEF_MOD("avb0", 211, R8A779G0_CLK_S0D4_HSC), + DEF_MOD("avb1", 212, R8A779G0_CLK_S0D4_HSC), + DEF_MOD("avb2", 213, R8A779G0_CLK_S0D4_HSC), DEF_MOD("hscif0", 514, R8A779G0_CLK_S0D3_PER), DEF_MOD("hscif1", 515, R8A779G0_CLK_S0D3_PER), DEF_MOD("hscif2", 516, R8A779G0_CLK_S0D3_PER),