From: hjl Date: Mon, 6 Dec 2010 14:41:41 +0000 (+0000) Subject: Add -march=/-mtune=corei7-avx. X-Git-Tag: upstream/4.9.2~24361 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e4168d53fbec2f3d5eb257140979e61eae7db09d;p=platform%2Fupstream%2Flinaro-gcc.git Add -march=/-mtune=corei7-avx. 2010-12-06 H.J. Lu * config.gcc: Allow corei7-avx for --with-arch/--with-cpu. * config/i386/driver-i386.c (host_detect_local_cpu): Support Sandy Bridge. * config/i386/i386.c (override_options): Handle "corei7-avx". * doc/invoke.texi: Document corei7-avx. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167495 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f01b9fe..6c21b40 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2010-12-06 H.J. Lu + + * config.gcc: Allow corei7-avx for --with-arch/--with-cpu. + + * config/i386/driver-i386.c (host_detect_local_cpu): Support + Sandy Bridge. + + * config/i386/i386.c (override_options): Handle "corei7-avx". + + * doc/invoke.texi: Document corei7-avx. + 2010-12-06 Richard Guenther PR tree-optimization/46806 diff --git a/gcc/config.gcc b/gcc/config.gcc index 50985fd..dfbf2c5 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -1234,7 +1234,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i need_64bit_hwint=yes need_64bit_isa=yes case X"${with_cpu}" in - Xgeneric|Xatom|Xcore2|Xcorei7|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) + Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) ;; X) if test x$with_cpu_64 = x; then @@ -1243,7 +1243,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i ;; *) echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2 - echo "generic atom core2 corei7 nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 + echo "generic atom core2 corei7 corei7-avx nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 exit 1 ;; esac @@ -1372,7 +1372,7 @@ i[34567]86-*-solaris2*) need_64bit_isa=yes use_gcc_stdint=wrap case X"${with_cpu}" in - Xgeneric|Xatom|Xcore2|Xcorei7|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) + Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) ;; X) if test x$with_cpu_64 = x; then @@ -1381,7 +1381,7 @@ i[34567]86-*-solaris2*) ;; *) echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2 - echo "generic atom core2 corei7 nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 + echo "generic atom core2 corei7 corei7-avx nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 exit 1 ;; esac @@ -1452,7 +1452,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*) if test x$enable_targets = xall; then tm_defines="${tm_defines} TARGET_BI_ARCH=1" case X"${with_cpu}" in - Xgeneric|Xatom|Xcore2|Xcorei7|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) + Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) ;; X) if test x$with_cpu_64 = x; then @@ -1461,7 +1461,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*) ;; *) echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2 - echo "generic atom core2 corei7 nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 + echo "generic atom core2 corei7 Xcorei7-avx nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 exit 1 ;; esac @@ -2828,6 +2828,10 @@ case ${target} in arch=corei7 cpu=corei7 ;; + corei7_avx-*) + arch=corei7-avx + cpu=corei7-avx + ;; pentium_m-*) arch=pentium-m cpu=pentium-m @@ -3265,7 +3269,7 @@ case "${target}" in "" | x86-64 | generic | native \ | k8 | k8-sse3 | athlon64 | athlon64-sse3 | opteron \ | opteron-sse3 | athlon-fx | bdver1 | amdfam10 \ - | barcelona | nocona | core2 | corei7 | atom) + | barcelona | nocona | core2 | corei7 | corei7-avx | atom) # OK ;; *) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index bf7ec0c..340283c 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -568,6 +568,10 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* Westmere. */ cpu = "corei7"; break; + case 0x2a: + /* Sandy Bridge. */ + cpu = "corei7-avx"; + break; case 0x17: case 0x1d: /* Penryn. */ diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index fafa299..c80a479 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3237,6 +3237,10 @@ ix86_option_override_internal (bool main_args_p) {"corei7", PROCESSOR_COREI7_64, CPU_COREI7, PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16}, + {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 + | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX + | PTA_CX16 | PTA_POPCNT | PTA_AES | PTA_PCLMUL}, {"atom", PROCESSOR_ATOM, CPU_ATOM, PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE}, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 7c80415..2813532 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12081,6 +12081,9 @@ instruction set support. @item corei7 Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set support. +@item corei7-avx +Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, +SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support. @item atom Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.