From: Damien Lespiau <damien.lespiau@intel.com>
Date: Sun, 3 Nov 2013 04:07:51 +0000 (-0700)
Subject: drm/i915/bdw: Broadwell has a max port clock of 300Mhz on HDMI
X-Git-Tag: upstream/snapshot3+hdmi~3958^2~8^2~22
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e3c3357863db7cb8e847b3adff5b6be94cecde82;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git

drm/i915/bdw: Broadwell has a max port clock of 300Mhz on HDMI

Just like HSW.

This means we can scan out a mode with a 300Mhz pixel clock with a depth
of 24 bits, but only a 200Mhz one with a 36bits depth.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 51a8336..03f9ca7 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -847,7 +847,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
 
 	if (IS_G4X(dev))
 		return 165000;
-	else if (IS_HASWELL(dev))
+	else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
 		return 300000;
 	else
 		return 225000;