From: aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sat, 11 Apr 2009 18:43:20 +0000 (+0000)
Subject: target-mips: don't map zero register as a TCG global
X-Git-Tag: TizenStudio_2.0_p2.3~9190
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e3985176b698dc62be83388da61ec554f68ed6dc;p=sdk%2Femulator%2Fqemu.git

target-mips: don't map zero register as a TCG global

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7094 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-mips/translate.c b/target-mips/translate.c
index f38e576..7f747d6 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8491,7 +8491,7 @@ static void mips_tcg_init(void)
         return;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
-    for (i = 0; i < 32; i++)
+    for (i = 1; i < 32; i++)
         cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
                                         offsetof(CPUState, active_tc.gpr[i]),
                                         regnames[i]);