From: Jason Liu Date: Fri, 5 Aug 2011 15:34:32 +0000 (+0800) Subject: ARM: iMX5: Don't enable DPLL if it already enabled X-Git-Tag: upstream/snapshot3+hdmi~9281^2~2^2~3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e1b96ada659431669efaf3defa997abf5db68130;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git ARM: iMX5: Don't enable DPLL if it already enabled If the DPLL is already enabled, don't try to enable it again. Since write to the DPLL control register will make the DPLL reset and which will cause some issues when some child module are sourced from this DPLL. Signed-off-by: Jason Liu Cc: Sascha Hauer Signed-off-by: Sascha Hauer --- diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 6b89c1b..0856482 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -271,7 +271,11 @@ static int _clk_pll_enable(struct clk *clk) int i = 0; pllbase = _get_pll_base(clk); - reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL); + if (reg & MXC_PLL_DP_CTL_UPEN) + return 0; + + reg |= MXC_PLL_DP_CTL_UPEN; __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); /* Wait for lock */